The ADC has four power supplies: AVDD1, AVDD2, AVSS, and IOVDD. Among the power-supply options, the number of power supplies can be reduced to a single 3.3-V supply used for AVDD1, AVDD2, and IOVDD, with AVSS connected to ground. Be aware that 3.3-V operation limits the reference voltage to 2.5 V and requires using the buffer for gain = 1.

The power supplies can be sequenced in any order. The ADC is held in reset until the power supplies have crossed the retrospective power-on voltage thresholds and the clock signal is applied (see Figure 6-8 for details of the voltage thresholds).