DOUT is the data output pin. Data are shifted out on the falling edge of SCLK and are latched by the host on the rising edge. Because the conversion data MSB is on DOUT when CS is driven low (DRDY low), the MSB of the data is read on the first rising edge of SCLK. Minimize trace length to reduce load capacitance on the pin. Place a series termination resistor close to the pin to terminate the PCB trace impedance. Taking CS high forces DOUT to a high-impedance state.