ZHCSK67B June 2017 – August 2019 ADS1287
PRODUCTION DATA.
The digital filter performs decimation and filtering of the modulator output to provide the final data output. By adjusting the amount of filtering, tradeoffs can be made between resolution and data rate. Lower data rates yield lower overall noise resulting from the reduction of bandwidth.
The digital filter is comprised of three filter stages, as shown in Figure 48: a variable-decimation, sinc filter; a fixed-decimation FIR filter; and a programmable frequency high-pass, IIR filter (HPF).
The output data can be taken from one of the three filter blocks. The sinc filter option provides partially filtered data. The partially filtered sinc data are intended for use with external decimation filters. For complete internal filtering, activate both the sinc filter and FIR filter stages. The HPF can also be included to remove DC and low frequencies from the data. Table 7 shows the filter options.
FILTR[1:0] REGISTER BITS | DIGITAL FILTERS SELECTION |
---|---|
00 | Reserved |
01 | Low-pass filter: sinc only |
10 | Low-pass filter: sinc + FIR (default) |
11 | Low-pass and high-pass filter: sinc + FIR + IIR |