ZHCSO82 November 2021 ADS130B02-Q1
PRODUCTION DATA
Multiple ADS130B02-Q1 devices can be arranged to capture all signals simultaneously. The same clock must be provided to all devices and the SYNC/RESET pins must be strobed simultaneously at least one time to align the sample periods internally between devices.
The devices can share the same SPI bus where only the CS pins for each device are unique. Each device can be addressed sequentially by asserting CS for the device that the host wishes to communicate with. The DOUT pin remains high impedance when the CS pin is high, allowing the DOUT lines to be shared between devices as long as no two devices sharing the bus simultaneously have their CS pins low. Figure 9-3 shows multiple devices configured for simultaneous data acquisition while sharing the same SPI bus.
Monitoring the DRDY output of only one of the devices is sufficient because all devices convert simultaneously.