10.3 Do's and Don'ts

• Do partition the analog, digital, and power-supply circuitry into separate sections on the printed circuit board (PCB).
• Do use a single ground plane for analog and digital grounds.
• Do place the analog components close to the ADC pins using short, direct connections.
• Do keep the SCLK pin free of glitches and noise.
• Do verify that the analog input voltages are within the specified voltage range under all input conditions.
• Do tie unused analog input pins to GND.
• Do provide current limiting to the analog inputs in case overvoltage faults occur.
• Do use a low-dropout (LDO) regulator to reduce ripple voltage generated by switch-mode power supplies. This reduction is especially true for AVDD where the supply noise can affect performance.
• Do keep the input series resistance low to maximize THD performance.
• Do not cross analog and digital signals.
• Do not allow the analog power supply voltages (AVDD – AVSS) to exceed 3.6 V under any conditions, including during power-up and power-down when the negative charge pump is enabled.
• Do not allow the analog power supply voltages (AVDD – AVSS) to exceed 6 V under any conditions, including during power-up and power-down when the negative charge pump is disabled.
• Do not allow the digital supply voltage to exceed 3.9 V under any conditions, including during power-up and power-down.

Figure 104 and Figure 105 illustrate correct and incorrect ADC circuit connections.

Figure 104. Correct and Incorrect Circuit Connections

Figure 105. Correct and Incorrect Circuit Connections, Continued