The ADS131B02-Q1 uses an SPI-compatible interface to configure the device and retrieve conversion data. The device always acts as an SPI peripheral; SCLK and CS are inputs to the interface. The interface operates in SPI mode 1 where CPOL = 0 and CPHA = 1. In SPI mode 1, the SCLK idles low and data are launched or changed only on SCLK rising edges; data are latched or read by the controller and peripheral on SCLK falling edges. The interface is full-duplex, meaning data can be sent and received simultaneously by the interface. The device includes the typical SPI signals: SCLK, CS, DIN (MOSI), and DOUT (MISO). In addition, there are two other digital pins that provide additional functionality. The DRDY pin serves as a flag to the host to indicate new conversion data are available. The SYNC/RESET pin is a dual-function pin that allows synchronization of conversions to an external event and allows for a hardware device reset.