Synchronization can be performed by the host to make sure the ADC conversions are synchronized to an external event. For example, synchronization can realign the data capture to the expected timing of the host if a glitch on the clock causes the host and device to become out of synchronization.

The SYNC/RESET pin is a multifunction digital input pin that allows the host to synchronize conversions to an external event or to reset the device. See the Section 8.4.1.2 section for more details regarding how the device is reset.

Provide a negative pulse on the SYNC/RESET pin with a duration less than t_w(RSL) but greater than a MCLK period to trigger synchronization. The device internally compares the leading negative edge of the pulse to its internal clock that tracks the data rate. The internal data rate clock has timing equivalent to the DRDY pin. If the negative edge on SYNC/RESET aligns with the internal data rate clock, the device is determined to be synchronized and therefore no action is taken. If there is misalignment, the digital filters on the device are reset to be synchronized with the SYNC/RESET pulse.

In global-chop mode conversions are always immediately restarted at the falling edge of the SYNC/RESET pin.