ZHCSMK3B November 2020 – November 2021 ADS131B04-Q1
PRODUCTION DATA
The ADS131B04-Q1 performs a CRC on its own register map as a means to check for unintended changes to the registers. Enable the register map CRC by setting the REG_CRC_EN bit in the MODE register. When enabled, the device constantly calculates the register map CRC across the registers ranging from address 02h to 1Ch including the reserved registers. The CRC is calculated beginning with the MSB of register 02h and ending with the LSB of register 1Ch using the polynomial selected in the CRC_TYPE bit in the MODE register. Two types of CRC polynomials are available: CCITT CRC and ANSI CRC (CRC-16). See Table 8-8 for details on the CRC polynomials. The CRC calculation is initialized with the seed value of FFFFh.
The calculated CRC is a 16-bit value and is stored in the REGMAP_CRC register. The calculation is done using one register map bit per MCLK period and constantly checks the result against the previous calculation. The REG_MAP bit in the STATUS register is set to flag the host if the register map CRC changes, including changes resulting from register writes. The REG_MAP bit is cleared by reading the STATUS register, or when the STATUS register is output as a response to the NULL command.