Good power-supply decoupling is important to achieve optimum performance.

• APWR and AVDD must each be decoupled with a 1-µF capacitor to AGND.
  If APWR and AVDD are shorted together, a single 1-µF decoupling capacitor placed close to the AVDD pin is sufficient.
• DPWR and IOVDD must each be decoupled with a 1-µF capacitor to DGND.
  If DPWR and IOVDD are shorted together, a single 1-µF decoupling capacitor placed close to the IOVDD pin is sufficient.
• If APWR and DPWR are shorted together, a single 1-µF decoupling capacitor for the two supplies is sufficient.
• The DVDD LDO output at the DCAP pin must be decoupled with a 220-nF capacitor to DGND.

Place the bypass capacitors as close to the power-supply pins of the device as possible with low-impedance connections. Using multilayer ceramic chip capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics are recommended for power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to the device pins can offer superior noise immunity. The use of multiple vias in parallel lowers the overall inductance and is beneficial for connections to ground planes.