ZHCSN80 july 2023 ADS131B24-Q1
PRODUCTION DATA
Diagnostics detect faults within a monitoring circuit to check if the monitor is still working as intended. Enable a diagnostic using the respective enable bit in Table 9-15 to inject a fault condition into the monitoring circuit. When the according monitor fault flag sets to 0b within the specified monitor fault response time (see the Electrical Characteristics table), the diagnostic completed successfully, indicating a correctly working monitor.
Except for the main clock frequency monitor diagnostics (MCLK_HI_DIAG_EN and MCLK_LO_DIAG_EN), all diagnostics can be performed simultaneously to save execution time. The MCLK_HI_DIAG_EN and MCLK_LO_DIAG_EN diagnostics must be performed sequentially. However, either the MCLK_HI_DIAG_EN or the MCLK_LO_DIAG_EN can be executed together with all other diagnostics.
The following steps outline the general procedure for implementing a monitor diagnostic. An example for implementing the AVDD UV monitor diagnostic is shown in parentheses.
The memory map CRC diagnostic is a small exception. Instead of an enable bit, select any of the three bit patterns available in the MEM_MAP_CRC_DIAG[1:0] bit field to inject into the memory map CRC calculation.