ZHCSN80 july   2023 ADS131B24-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 说明（续）
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagram
    9. 7.9 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1 Offset Drift Measurement
    2. 8.2 Gain Drift Measurement
    3. 8.3 Noise Performance
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Naming Conventions
      2. 9.3.2 Precision Voltage References (REFA, REFB)
      3. 9.3.3 Clocking (MCLK, OSCM, OSCD)
      4. 9.3.4 ADC1y
        1. 9.3.4.1 ADC1y Input Multiplexer
        2. 9.3.4.2 ADC1y Programmable Gain Amplifier (PGA)
        3. 9.3.4.3 ADC1y ΔΣ Modulator
        4. 9.3.4.4 ADC1y Digital Filter
        5. 9.3.4.5 ADC1y Offset and Gain Calibration
        6. 9.3.4.6 ADC1y Conversion Data
      5. 9.3.5 ADC2y
        1. 9.3.5.1 ADC2y Input Multiplexer
        2. 9.3.5.2 ADC2y Programmable Gain Amplifier (PGA)
        3. 9.3.5.3 ADC2y ΔΣ Modulator
        4. 9.3.5.4 ADC2y Digital Filter
        5. 9.3.5.5 ADC2y Offset and Gain Calibration
        6. 9.3.5.6 ADC2y Sequencer
        7. 9.3.5.7 VCMy Buffers
        8. 9.3.5.8 ADC2y Measurement Configurations
        9. 9.3.5.9 ADC2y Conversion Data
      6. 9.3.6 General-Purpose Digital Inputs and Outputs (GPIO0 to GPIO4)
        1. 9.3.6.1 GPIOx PWM Output Configuration
        2. 9.3.6.2 GPIOx PWM Input Readback
      7. 9.3.7 General-Purpose Digital Inputs and Outputs (GPIO0A, GPIO1A, GPIO0B, GPIO1B)
      8. 9.3.8 Monitors and Diagnostics
        1. 9.3.8.1  Supply Monitors
        2. 9.3.8.2  Clock Monitors
        3. 9.3.8.3  Digital Monitors
          1. 9.3.8.3.1 Register Map CRC
          2. 9.3.8.3.2 Memory Map CRC
          3. 9.3.8.3.3 GPIO Readback
        4. 9.3.8.4  Communication Monitors
        5. 9.3.8.5  Fault Flags and Fault Masking
        6. 9.3.8.6  FAULT Pin
        7. 9.3.8.7  Diagnostics and Diagnostic Procedure
        8. 9.3.8.8  Indicators
        9. 9.3.8.9  Conversion and Sequence Counters
        10. 9.3.8.10 Supply Voltage Readback
        11. 9.3.8.11 Temperature Sensors (TSA, TSB)
        12. 9.3.8.12 Test DACs (TDACA, TDACB)
        13. 9.3.8.13 Open-Wire Detection
        14. 9.3.8.14 Missing Host Detection and MHD Pin
        15. 9.3.8.15 Overcurrent Comparators (OCCA, OCCB)
          1. 9.3.8.15.1 OCCA and OCCB Pins
          2. 9.3.8.15.2 Overcurrent Indication Response Time
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Up and Reset
        1. 9.4.1.1 Power-On Reset (POR)
        2. 9.4.1.2 RESETn Pin
        3. 9.4.1.3 RESET Command
      2. 9.4.2 Operating Modes
        1. 9.4.2.1 Active Mode
        2. 9.4.2.2 Standby Mode
        3. 9.4.2.3 Power-Down Mode
      3. 9.4.3 ADC Conversion Modes
        1. 9.4.3.1 ADC1y Conversion Modes
          1. 9.4.3.1.1 Continuous-Conversion Mode
          2. 9.4.3.1.2 Single-Shot Conversion Mode
          3. 9.4.3.1.3 Global-Chop Mode
            1. 9.4.3.1.3.1 Overcurrent Indication Response Time in Global-Chop Mode
        2. 9.4.3.2 ADC2y Sequencer Operation and Sequence Modes
          1. 9.4.3.2.1 Continuous Sequence Mode
          2. 9.4.3.2.2 Single-Shot Sequence Mode
          3. 9.4.3.2.3 Synchronized Single-Shot Sequence Mode Based on ADC1y Conversion Starts
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
        1. 9.5.1.1 Serial Interface Signals
          1. 9.5.1.1.1 Chip Select (CSn)
          2. 9.5.1.1.2 Serial Data Clock (SCLK)
          3. 9.5.1.1.3 Serial Data Input (SDI)
          4. 9.5.1.1.4 Serial Data Output (SDO)
          5. 9.5.1.1.5 Data Ready (DRDYn)
        2. 9.5.1.2 Serial Interface Communication Structure
          1. 9.5.1.2.1 SPI Communication Frames
          2. 9.5.1.2.2 SPI Communication Words
          3. 9.5.1.2.3 STATUS Word
          4. 9.5.1.2.4 Communication Cyclic Redundancy Check (CRC)
          5. 9.5.1.2.5 Commands
            1. 9.5.1.2.5.1 NULL (0000 0000 0000 0000b)
            2. 9.5.1.2.5.2 RESET (0000 0000 0001 0001b)
            3. 9.5.1.2.5.3 LOCK (0000 0101 0101 0101b)
            4. 9.5.1.2.5.4 UNLOCK (0000 0110 0101 0101b)
            5. 9.5.1.2.5.5 WREG (011a aaaa aaa0 0nnnb)
            6. 9.5.1.2.5.6 RREG (101a aaaa aaan nnnnb)
          6. 9.5.1.2.6 SCLK Counter
          7. 9.5.1.2.7 SPI Timeout
          8. 9.5.1.2.8 Reading ADC1A, ADC1B, ADC2A, and ADC2B Conversion Data
          9. 9.5.1.2.9 DRDYn Pin Behavior
    6. 9.6 Register Map
      1. 9.6.1 Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Unused Inputs and Outputs
      2. 10.1.2 Minimum Interface Connections
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Current Shunt Measurement
        2. 10.2.2.2 Battery Pack Voltage Measurement
        3. 10.2.2.3 Shunt Temperature Measurement
        4. 10.2.2.4 Analog Output Temperature Sensor Measurement
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
      1. 10.3.1 Power-Supply Options
        1. 10.3.1.1 Single Unregulated External 4-V to 16-V Supply (3.3-V Digital I/O Levels)
        2. 10.3.1.2 Single Regulated External 3.3-V Supply (3.3-V Digital IO Levels)
        3. 10.3.1.3 Single Regulated External 5-V Supply (5-V Digital I/O Levels)
      2. 10.3.2 Power-Supply Sequencing
      3. 10.3.3 Power-Supply Decoupling
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.9 Typical Characteristics

at TA = 25°C, APWR = 5 V, DPWR = 5 V, and external clock with fCLK = 8.192 MHz (unless otherwise noted)

GUID-20221218-SS0I-BQGZ-VPTJ-HGXJWVZSBH8K-low.svg
32 devices, gain = 8, global-chop disabled, input referred
Figure 7-2 ADC1y Offset Error Histogram
GUID-20221218-SS0I-N85V-PGVR-SXBGGS220ZS8-low.svg
32 devices, gain = 8, global-chop enabled, input referred
Figure 7-4 ADC1y Offset Error Histogram
GUID-20221222-SS0I-9KDQ-M5F1-JFRCHQKTJCSG-low.svg
32 devices, gain = 4, including error of REFy
Figure 7-6 ADC1y Gain Error Histogram
GUID-20221218-SS0I-RHZN-J9SJ-GRLSDGHSFJWD-low.svg
32 devices, gain = 1, input referred
Figure 7-8 ADC2y Offset Error Histogram
GUID-20221218-SS0I-LCJT-9HV8-PTKL1HGFBD5W-low.svg
32 devices, gain = 1, including error of REFy
Figure 7-10 ADC2y Gain Error Histogram
GUID-20221219-SS0I-JK84-CH9R-DNK8MKSZ65W7-low.svg
32 devices 
Figure 7-12 REFy Output Voltage Histogram
GUID-20221218-SS0I-VQ4M-0M62-NRSVBTRCXL2K-low.svg
 32 devices
Figure 7-14 OSCM and OSCD Frequency Histogram
GUID-20221218-SS0I-MWSP-6SVQ-DJ0LRNQSXVML-low.svg
27 devices, ADC1y gain = 4, input referred
Figure 7-16 OCCy Offset Error Histogram
GUID-20221218-SS0I-MQBL-T0C6-SZQ7GCNMKJTC-low.svg
32 devices, ADC1y gain = 4, including error of REFy
Figure 7-18 OCCy Gain Error Histogram
GUID-20221220-SS0I-DCFV-XHXX-78BBQVTBS0HQ-low.svg
28 devices
Figure 7-20 Temperature Sensor Output Voltage Histogram
GUID-20221220-SS0I-BKBR-2MG2-CJGSBG0BPXZM-low.svg
 TDACy output voltage = 9 × VREFy / 40
Figure 7-22 Test DACy Output Voltage Histogram
GUID-20221220-SS0I-X5VJ-SLL3-5DRWMLFFMHTJ-low.svg
 TDACy output voltage = –9 × VREFy / 40 
Figure 7-24 Test DACy Output Voltage Histogram
GUID-20221219-SS0I-55VK-DGTT-RVDQK2KW6JCN-low.svg
APWR or DPWR
Figure 7-26 ADC2y Supply Voltage Readback Measurement Accuracy
GUID-20230429-SS0I-MLP8-TZDM-Z4LRRJL5GPDG-low.svg
AVDD = 3.3 V
Figure 7-28 Analog GPIO Pin Output Voltage vs
Sinking Current
GUID-20230429-SS0I-KGKT-GBPN-JVRGJX8WX5HM-low.svg
IOVDD = 3.3 V
Figure 7-30 Digital Pin Output Voltage vs Sinking Current
GUID-20221218-SS0I-WMZR-FQKR-T38L9TW07NHD-low.svg
 
Figure 7-32 VCMy Output Voltage vs Temperature
GUID-20221218-SS0I-FXQS-QS2C-RJCH6BJ8W22H-low.svg
 
Figure 7-34 AVDD and IOVDD LDO Output Voltage vs Temperature
GUID-20230501-SS0I-VD2K-3GRW-RR8SLNXK4HM2-low.svg
Active mode, all ADCs enabled and converting
Figure 7-36 Supply Current vs Supply Voltage
GUID-20221218-SS0I-D5FR-1XGW-N9SWG4MK7Z25-low.svg
Global-chop disabled, input referred
Figure 7-3 ADC1y Offset Error vs Temperature
GUID-20221218-SS0I-3S5P-HX5S-NJ557LRPX3TQ-low.svg
Global-chop enabled, input referred
Figure 7-5 ADC1y Offset Error vs Temperature
GUID-20221218-SS0I-WNMP-TQGR-PHFSQG9C5751-low.svg
Including error of REFy
Figure 7-7 ADC1y Gain Error vs Temperature
GUID-20221218-SS0I-V2PV-GSFF-XNBDGDVLTL0S-low.svg
Input referred
Figure 7-9 ADC2y Offset Error vs Temperature
GUID-20221218-SS0I-0W8N-WHZR-XQR2QFGJFVVR-low.svg
Including error of REFy
Figure 7-11 ADC2y Gain Error vs Temperature
GUID-20221218-SS0I-4KN0-WL8L-4T6NQC4GQBSC-low.svg
 
Figure 7-13 REFy Output Voltage vs Temperature
GUID-20221218-SS0I-QFN1-TXVV-NFMW73DXFQKC-low.svg
 
Figure 7-15 OSCM and OSCD Frequency vs Temperature
GUID-20221218-SS0I-5GG4-TSDX-1VTCCMQMRJ4J-low.svg
Input referred
Figure 7-17 OCCy Offset Error vs Temperature
GUID-20221218-SS0I-NDJH-J0BG-H6RXD5LMRPCL-low.svg
Including error of REFy
Figure 7-19 OCCy Gain Error vs Temperature
GUID-20221220-SS0I-JXZB-8GS9-LLMFNWJWB8PM-low.svg
 
Figure 7-21 Temperature Sensor Measurement Error vs Ambient Temperature
GUID-20221220-SS0I-H7N7-NM5Q-GRSNMCB0MCWJ-low.svg
TDACy output voltage = 9 × VREFy / 40 
Figure 7-23 Test DACy Output Voltage vs Temperature
GUID-20221220-SS0I-BPCB-G1SN-9HDTPTTJXXT2-low.svg
TDACy output voltage = –9 × VREFy / 40 
Figure 7-25 Test DACy Output Voltage vs Temperature
GUID-20221219-SS0I-X7JN-9GDB-M9MBDX5TTQJG-low.svg
AVDD or IOVDD
Figure 7-27 ADC2y Supply Voltage Readback Measurement Accuracy
GUID-20230429-SS0I-HGK6-MHTJ-H3LX4LVCCWQ1-low.svg
AVDD = 3.3 V
Figure 7-29 Analog GPIO Pin Output Voltage vs
Sourcing Current
GUID-20230429-SS0I-CLKR-1V4R-RWGW6ZSRRXG8-low.svg
IOVDD = 3.3 V
Figure 7-31 Digital Pin Output Voltage vs Sourcing Current
GUID-20221218-SS0I-PSRP-GNVQ-C53JCXWXD96R-low.svg
32 devices
Figure 7-33 AVDD and IOVDD LDO Output Voltage Histogram
GUID-20230501-SS0I-SJLD-SR80-R5ZLKNSNBQF2-low.svg
Active mode, all ADCs enabled and converting
Figure 7-35 Supply Current vs Temperature
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