ZHCSN80 july 2023 ADS131B24-Q1
PRODUCTION DATA
The ADS131B24-Q1 is reset in one three ways:
After a reset occurs, the user registers reset to the respective default settings and the device is in active mode. All ADCs are enabled, but no conversions are started. With all three reset options, a low-to-high transition on the DRDYn pin indicates that the SPI interface is ready for communication. The device ignores any SPI communication before this point and SDO stays low.