ZHCSEJ3B June   2015  – April 2020 ADS131E08S

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
    1.     电源应用：三相电压和电流连接
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Noise Measurements
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Electromagnetic Interference (EMI) Filter
      2. 9.3.2  Input Multiplexer
        1. 9.3.2.1 Device Noise Measurements
        2. 9.3.2.2 Test Signals (TestP and TestN)
        3. 9.3.2.3 Temperature Sensor (TempP, TempN)
        4. 9.3.2.4 Power-Supply Measurements (MVDDP, MVDDN)
      3. 9.3.3  Analog Input
      4. 9.3.4  PGA Settings and Input Range
        1. 9.3.4.1 Input Common-Mode Range
      5. 9.3.5  ΔΣ Modulator
      6. 9.3.6  Clock
      7. 9.3.7  Digital Decimation Filter
      8. 9.3.8  Voltage Reference
      9. 9.3.9  Input Out-of-Range Detection
      10. 9.3.10 General-Purpose Digital I/O (GPIO)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Down
      2. 9.4.2 Reset
      3. 9.4.3 Conversion Mode
        1. 9.4.3.1 START Pin Low-to-High Transition or START Command Sent
        2. 9.4.3.2 Input Signal Step
        3. 9.4.3.3 Continuous Conversion Mode
    5. 9.5 Programming
      1. 9.5.1 SPI Interface
        1. 9.5.1.1 Chip Select (CS)
        2. 9.5.1.2 Serial Clock (SCLK)
        3. 9.5.1.3 Data Input (DIN)
        4. 9.5.1.4 Data Output (DOUT)
        5. 9.5.1.5 Data Ready (DRDY)
      2. 9.5.2 Data Retrieval
        1. 9.5.2.1 Status Word
        2. 9.5.2.2 Readback Length
        3. 9.5.2.3 Data Format
      3. 9.5.3 SPI Command Definitions
        1. 9.5.3.1  WAKEUP: Exit STANDBY Mode
        2. 9.5.3.2  STANDBY: Enter STANDBY Mode
        3. 9.5.3.3  RESET: Reset Registers to Default Values
        4. 9.5.3.4  START: Start Conversions
        5. 9.5.3.5  STOP: Stop Conversions
        6. 9.5.3.6  OFFSETCAL: Channel Offset Calibration
        7. 9.5.3.7  RDATAC: Start Read Data Continuous Mode
        8. 9.5.3.8  SDATAC: Stop Read Data Continuous Mode
        9. 9.5.3.9  RDATA: Read Data
        10. 9.5.3.10 RREG: Read from Register
        11. 9.5.3.11 WREG: Write to Register
        12. 9.5.3.12 Sending Multibyte Commands
    6. 9.6 Register Map
      1. 9.6.1 Register Descriptions
        1. 9.6.1.1 ID: ID Control Register (Factory-Programmed, Read-Only) (address = 00h) [reset = D2h]
          1. Table 11. ID: ID Control Register Field Descriptions
        2. 9.6.1.2 CONFIG1: Configuration Register 1 (address = 01h) [reset = 94h]
          1. Table 12. CONFIG1: Configuration Register 1 Field Descriptions
        3. 9.6.1.3 CONFIG2: Configuration Register 2 (address = 02h) [reset = 00h]
          1. Table 14. CONFIG2: Configuration Register 2 Field Descriptions
        4. 9.6.1.4 CONFIG3: Configuration Register 3 (address = 03h) [reset = E0h]
          1. Table 15. CONFIG3: Configuration Register 3 Field Descriptions
        5. 9.6.1.5 FAULT: Fault Detect Control Register (address = 04h) [reset = 00h]
          1. Table 16. FAULT: Fault Detect Control Register Field Descriptions
        6. 9.6.1.6 CHnSET: Individual Channel Settings (address = 05h to 0Ch) [reset = 10h]
          1. Table 17. CHnSET: Individual Channel Settings Field Descriptions
        7. 9.6.1.7 FAULT_STATP: Fault Detect Positive Input Status (address = 12h) [reset = 00h]
          1. Table 18. FAULT_STATP: Fault Detect Positive Input Status Field Descriptions
        8. 9.6.1.8 FAULT_STATN: Fault Detect Negative Input Status (address = 13h) [reset = 00h]
          1. Table 19. FAULT_STATN: Fault Detect Negative Input Status Field Descriptions
        9. 9.6.1.9 GPIO: General-Purpose IO Register (address = 14h) [reset = 0Fh]
          1. Table 20. GPIO: General-Purpose IO Register Field Descriptions
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Multiple Device Configuration
        1. 10.1.1.1 Synchronizing Multiple Devices
        2. 10.1.1.2 Standard Configuration
        3. 10.1.1.3 Daisy-Chain Configuration
      2. 10.1.2 Power Monitoring Specific Applications
      3. 10.1.3 Current Sensing
      4. 10.1.4 Voltage Sensing
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Initialization Set Up
      1. 10.3.1 Setting the Device Up for Basic Data Capture
  11. 11Power Supply Recommendations
    1. 11.1 Power-Up Timing
    2. 11.2 Recommended External Capacitor Values
    3. 11.3 Device Connections for Unipolar Power Supplies
    4. 11.4 Device Connections for Bipolar Power Supplies
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档
    2. 13.2 支持资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.1 Noise Measurements

Adjust the data rate and PGA gain to optimize the ADS131E08S noise performance. When averaging is increased by reducing the data rate, noise drops correspondingly. Increasing the PGA gain reduces the input-referred noise, which is particularly useful when measuring low-level signals. Table 1 summarizes the ADS131E08S noise performance with a 3-V analog power supply. Table 2 summarizes the ADS131E08S noise performance with a 5-V analog power supply. Data are representative of typical noise performance at TA = 25°C. Data shown are the result of averaging the readings from multiple devices and are measured with the inputs shorted together. A minimum of 1000 consecutive readings are used to calculate the RMS noise for each reading. For the two highest data rates, noise is limited by the ADC quantization noise and does not have a Gaussian distribution. Table 1 and Table 2 show measurements taken with an internal reference. Data are representative of the ADS131E08S noise performance shown in both effective resolution (EFF RES) and dynamic range when using a low-noise external reference (such as the REF5025). Effective resolution data in Table 1 and Table 2 are calculated using Equation 1 and dynamic range data in Table 1 and Table 2 are calculated using Equation 2.

Equation 1. ADS131E08S eq_effres_sbas590.gif
Equation 2. ADS131E08S eq_DR_sbas705.gif

Table 1. Input-Referred Noise, 3-V Analog Supply, and 2.4-V Reference

DR BITS
(CONFIG1 Register)		 OUTPUT DATA RATE (kSPS) –3-dB BANDWIDTH (Hz) PGA GAIN
x1 x2 x4 x8 x12
DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES
000 64 16768 74.1 12.81 74.1 12.80 74.0 12.79 74.0 1279 73.9 12.77
001 32 8384 89.6 15.39 89.6 15.38 89.4 15.35 88.6 15.31 87.6 15.05
010 16 4192 102.8 17.57 102.3 17.49 100.6 17.22 97.1 16.62 94.2 16.15
011 8 2096 108.2 18.5 107.4 18.4 105.2 18.0 101.6 17.4 98.9 17.0
100 4 1048 111.4 19.1 109.4 18.9 107.4 18.6 103.5 17.9 100.5 17.5
101 2 524 114.6 19.6 113.7 19.5 111.4 19.1 107.7 18.5 104.9 18.0
110 1 262 117.7 20.1 116.8 20.0 114.5 19.6 110.7 19.0 108.0 18.5

Table 2. Input-Referred Noise, 5-V Analog Supply, and 4-V Reference

DR BITS
(CONFIG1 Register)		 OUTPUT DATA RATE (kSPS) –3-dB BANDWIDTH (Hz) PGA GAIN
x1 x2 x4 x8 x12
DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES DYNAMIC RANGE (dB) EFF RES
000 64 16768 74.7 12.91 74.7 12.91 74.7 12.91 74.7 12.91 74.6 12.89
001 32 8384 90.3 15.51 90.3 15.50 90.2 15.49 89.9 15.43 89.4 15.35
010 16 4192 104.3 17.83 104.0 17.78 103.1 17.62 100.5 17.30 98.1 16.80
011 8 2096 112.3 19.3 111.6 19.1 109.7 18.8 106.3 18.2 103.8 17.8
100 4 1048 116.0 19.8 115.2 19.7 113.1 19.3 109.5 18.8 106.9 18.3
101 2 524 119.1 20.3 118.2 20.2 116.2 19.9 112.6 193 109.9 18.8
110 1 262 122.1 20.9 121.3 20.7 119.1 20.4 115.6 19.8 112.9 19.3
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