SPI communication on the ADS131M03-Q1 is performed in frames. Each SPI communication frame consists of several words. The word size is configurable as either 16 bits, 24 bits, or 32 bits by programming the WLENGTH[1:0] bits in the MODE register.

The ADS131M03-Q1 implements a timeout feature for SPI communication. Enable or disable the timeout using the TIMEOUT bit in the MODE register. When enabled, the entire SPI frame (first SCLK to last SCLK) must complete within 2¹⁵ CLKIN cycles otherwise the SPI resets. This feature is provided as a means to recover SPI synchronization for cases where CS is tied low.

The interface is full duplex, meaning that the interface is capable of transmitting data on DOUT while simultaneously receiving data on DIN. The input frame that the host sends on DIN always begins with a command. The first word on the output frame that the device transmits on DOUT always begins with the response to the command that was written on the previous input frame. The number of words in a command depends on the command provided. For most commands, there are five words in a frame. On DIN, the host provides the command, the command CRC if input CRC is enabled or a word of zeros if input CRC is disabled, and three additional words of zeros. Simultaneously on DOUT, the device outputs the response from the previous frame command, three words of ADC data representing the three ADC channels, and a CRC word. Figure 8-17 illustrates a typical command frame structure.

Figure 8-17 Typical Communication Frame

There are some commands that require more than five words. In the case of a read register (RREG) command where more than a single register is read, the response to the command contains the acknowledgment of the command followed by the register contents requested, which may require a larger frame depending on how many registers are read. See the Section 8.5.1.10.7 section for more details on the RREG command.

In the case of a write register (WREG) command where more than a single register is written, the frame extends to accommodate the additional data. See the Section 8.5.1.10.8 section for more details on the WREG command.

See the Section 8.5.1.10 section for a list of all valid commands and their corresponding responses on the ADS131M03-Q1.

Under special circumstances, a data frame can be shortened by the host. See the Section 8.5.1.11 section for more information about artificially shortening communication frames.