SBAS486F November   2009  – February 2016 ADS41B29 , ADS41B49

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: General
    6. 6.6  Electrical Characteristics: ADS41B29, ADS41B49
    7. 6.7  Digital Characteristics
    8. 6.8  Timing Requirements: LVDS and CMOS Modes
    9. 6.9  Timing Requirements: Reset
    10. 6.10 Timing Requirements: LVDS Timing Across Sampling Frequencies
    11. 6.11 Timing Requirements: CMOS Timing Across Sampling Frequencies
    12. 6.12 Timing Requirements: CMOS Timing Across Sampling Frequencies
    13. 6.13 Typical Characteristics: ADS41B49
    14. 6.14 Typical Characteristics: ADS41B29
    15. 6.15 Typical Characteristics: General
    16. 6.16 Typical Characteristics: Contour
  7. 7 Parameter Measurement Information
    1. 7.1 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Clock Input
      3. 8.3.3 Gain for SFDR, SNR Trade-Off
      4. 8.3.4 Offset Correction
      5. 8.3.5 Digital Output Information
        1. 8.3.5.1 Output Interface
        2. 8.3.5.2 DDR LVDS Outputs
        3. 8.3.5.3 LVDS Output Data and Clock Buffers
        4. 8.3.5.4 Parallel CMOS Interface
        5. 8.3.5.5 CMOS Interface Power Dissipation
        6. 8.3.5.6 Input Overvoltage Indication (OVR Pin)
        7. 8.3.5.7 Output Data Format
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration
      2. 8.4.2 Power-Down
        1. 8.4.2.1 Power-Down Global
        2. 8.4.2.2 Standby
        3. 8.4.2.3 Output Buffer Disable
        4. 8.4.2.4 Input Clock Stop
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 Register Initialization
      2. 8.5.2 Serial Register Readout
    6. 8.6 Register Maps
      1. 8.6.1 Serial Register Map
        1. 8.6.1.1 Summary of High-Performance Modes
        2. 8.6.1.2 Description of Serial Registers
          1. 8.6.1.2.1  Register Address 00h (address = 00h) [reset = 00h]
          2. 8.6.1.2.2  Register Address 01h (address = 01h) [reset = 00h]
          3. 8.6.1.2.3  Register Address 03h (address = 03h) [reset = 00h]
          4. 8.6.1.2.4  Register Address 25h (address = 25h) [reset = 50h]
          5. 8.6.1.2.5  Register Address 26h (address = 26h) [reset = 00h]
          6. 8.6.1.2.6  Register Address 3Dh (address = 3Dh) [reset = 00h]
          7. 8.6.1.2.7  Register Address 3Fh (address = 3Fh) [reset = 00h]
          8. 8.6.1.2.8  Register Address 40h (address = 40h) [reset = 00h]
          9. 8.6.1.2.9  Register Address 41h (address = 41h) [reset = 00h]
          10. 8.6.1.2.10 Register Address 42h (address = 42h) [reset = 08h]
          11. 8.6.1.2.11 Register Address 43h (address = 43h) [reset = 00h]
          12. 8.6.1.2.12 Register Address 4Ah (address = 4Ah) [reset = 00h]
          13. 8.6.1.2.13 Register Address BFh (address = BFh) [reset = 00h]
          14. 8.6.1.2.14 Register Address CFh (address = CFh) [reset = 00h]
          15. 8.6.1.2.15 Register Address DFh (address = DFh) [reset = 00h]
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Drive Circuit Requirements
      2. 9.1.2 Driving Circuit
  10. 10Power Supply Recommendations
    1. 10.1 Power-Supply Sequence
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Design Considerations
        1. 11.1.1.1 Grounding
        2. 11.1.1.2 Supply Decoupling
        3. 11.1.1.3 Exposed Pad
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11 Layout

11.1 Layout Guidelines

11.1.1 Board Design Considerations

11.1.1.1 Grounding

A single ground plane is sufficient to give good performance, provided the analog, digital, and clock sections of the board are cleanly partitioned. See the ADS414x, ADS412x EVM User Guide, SLWU067 for details on layout and grounding.

11.1.1.2 Supply Decoupling

Because the ADS41Bx9 already includes internal decoupling, minimal external decoupling can be used without loss in performance. Note that decoupling capacitors can help filter external power-supply noise, so the optimum number of capacitors depends on the actual application. Place the decoupling capacitors very close to the converter supply pins.

11.1.1.3 Exposed Pad

In addition to providing a path for heat dissipation, the PowerPAD is also electrically internally connected to the digital ground. Therefore, the exposed pad must be soldered to the ground plane for best thermal and electrical performance. For detailed information, see application notes VQFN Layout Guidelines, SLOA122, and VQFN/SON PCB Attachment, SLUA271, both available for download at the TI web site (www.ti.com).
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