ZHCS367E July 2011 – January 2016 ADS4249
PRODUCTION DATA.
The ADS4249 has two power supplies, one analog (AVDD) and one digital (DRVDD) supply. Both supplies have a nominal voltage of 1.8 V. The AVDD supply is noise sensitive and the digital supply is not.
For best performance the AVDD supply must be driven by a low-noise linear regulator (LDO) and separated from the DRVDD supply. AVDD and DRVDD can share a single supply but they must be isolated by a ferrite bead and bypass capacitors, in a PI-filter configuration, at a minimum. The digital noise is concentrated at the sampling frequency and harmonics of the sampling frequency and can contain noise related to the sampled signal. When developing schematics, leave extra placeholders for additional supply filtering.
DC-DC switching power supplies can be used to power DRVDD without issue. AVDD can also be powered from a switching regulator. Noise and spurs on the AVDD power supply affect the SNR and SFDR of the ADC and show up near dc and as a modulated component around the input frequency. If a switching regulator is used, then design it to have minimal voltage ripple. Use supply filtering to limit the amount of spurious noise at the AVDD supply pins. Allow for extra placeholders on the schematic for additional filtering. Optimization of filtering in the final system is likely required to achieve the desired performance. The choice of power supply ultimately depends on the system requirements. For instance, if very low phase noise is required, then using a switching regulator is not recommended.
Because the ADS4249 already includes internal decoupling, minimal external decoupling can be used without loss in performance. Note that decoupling capacitors can help filter external power-supply noise; thus, the optimum number of capacitors depends on the actual application. A 0.1-uF capacitor is recommended near each supply pin. The decoupling capacitors must be placed very close to the converter supply pins.