8.3.6 Data Formatting

The data formatting block does two functions: truncation and test pattern insertion. The serialization block following the data formatting block performs a parallel-to-serial conversion of the input word. The serialization factor is programmable to 10, 12, 14, or 16. The truncation block truncates the DIGOUT signal to the number of bits specified by the serialization factor. The number of bits in DIGRES1 to DIGRES16 is therefore determined by the serialization factor. Again, some of the bits in DIGRES may always be zero, depending on the combination of ADC resolution, what digital features are enabled or disabled, and the serialization factor that is programmed. To aid the FPGA in capturing and deserializing the serial output, the device includes provisions to replace the ADC data with test patterns. The SERIAL_IN1 to SERIAL_IN16 signals are the same as the DIGRES1 to DIGRES16 signals during normal operation. When a test pattern is programmed, the DIGRES signals are replaced with the appropriate test pattern. The manner in which a given test pattern actually comes out of the LVDS lines can be altered based on the serializer operating mode because the serializer itself has multiple modes (LSB-, MSB-first modes and 1X, 2X data rate modes).