9.1.3 SNR and Clock Jitter

The signal-to-noise ratio (SNR) of the ADC is limited by three different factors: quantization noise, thermal noise, and jitter, as shown in Equation 4. The quantization noise is typically not noticeable in pipeline converters and is 98 dB for a 16-bit ADC. The thermal noise limits the SNR at low input frequencies and the clock jitter sets the SNR for higher input frequencies.

Equation 4.

The SNR limitation resulting from sample clock jitter can be calculated by Equation 5:

Equation 5.

The total clock jitter (T_Jitter) has two components: the internal aperture jitter (130 fs) is set by the noise of the clock input buffer and the external clock jitter. T_Jitter can be calculated by Equation 6:

Equation 6.

External clock jitter can be minimized by using high-quality clock sources and jitter cleaners as well as band-pass filters at the clock input. A faster clock slew rate also improves the ADC aperture jitter.

The ADS54J60 has a thermal noise of approximately 71.1 dBFS and an internal aperture jitter of 120 fs. The SNR, depending on the amount of external jitter for different input frequencies, is shown in Figure 141.

Figure 141. SNR versus Input Frequency and External Clock Jitter