ZHCSE42D April 2015 – April 2019 ADS54J60
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | FORMAT EN | 0 | 0 | 0 | 0 | 0 |
W-0h | W-0h | R/W-0h | W-0h | W-0h | W-0h | W-0h | W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-6 | 0 | W | 0h | Must write 0 |
5 | FORMAT EN | R/W | 0h | This bit enables control for data format selection using the FORMAT SEL register bit.
0 = Default, output is in twos complement format 1 = Output is in offset binary format after FORMAT SEL bit is also set |
4-0 | 0 | W | 0h | Must write 0 |