7.3.9 Digital Window Comparator

The internal Digital Window Comparator is available in all modes. In Autonomous Modes with Thresholds monitoring and Diagnostics, the digital window comparator controls the filling of the data and the output of the alert pin and in other modes, it only controls the output of the alert pin. Figure 47 provides the block diagram for digital window comparator.

Figure 47. Digital Comparator Block Diagram

The Low Side Threshold, High Side Threshold, and Hysteresis parameters are independently programmable for each input channel. Figure 48 shows the comparison thresholds and hysteresis for the two comparators. A Pre-Alert event counter after each comparator counts the output of the comparator and sets the latched flags. The Pre-Alert Event Counter settings are common to the two channels.

Figure 48. Thresholds, Hysteresis and Event Counter for Digital Window Comparator

DWC_BLOCK_EN bit in ALERT_DWC_EN register enables/disables the complete Digital Window Comparator block (disabled at power-up) and ALERT_EN_CHx bits in ALERT_CHEN register enables Digital Window Comparator for individual channels. Once enabled, whenever a new conversion result is available:

1. The output of the high side comparator transitions to logic high when the conversion result is greater than the High Threshold. This comparator resets when the conversion result is less than the High Threshold – Hysteresis.
2. The output of the low side comparator transitions to logic high when the conversion result is less than the Low Threshold. This comparator resets when the conversion result is greater than the Low Threshold + Hysteresis.
3. A different threshold and hysteresis can be used for each channel.
4. Once the output of either the high side or low side comparator transitions high the Pre-Alert Event Counter begins to increment for each subsequent conversion. This counter continues to increment until it reaches the value stored in the PRE_ALT_MAX_EVENT_COUNT register. Once it reaches PRE_ALT_MAX_EVENT_COUNT, the Alert becomes active and sets the latched flags. If the comparator output becomes zero before counter reaches PRE_ALT_MAX_EVENT_COUNT, then the event counter is reset to zero, Alert does not be set and lateched flag is not set.

Therefore, the latched flags (high and low) for the channel are updated only if the respective comparator output remains 1 for the specified number of consecutive conversions (set by the PRE_ALT_MAX_EVENT_COUNT).

The latched flags can be read from the ALERT_LOW_FLAGS and ALERT_HIGH_FLAGS registers. To clear a latched flag, write 1 to the applicable bit location. The ALERT pin status is re-evaluated whenever an applicable latched flag gets set or is cleared.

The response time for ALERT pin can be estimated by Equation 6