ZHCSH75A September 2017 – December 2017 ADS7142
PRODUCTION DATA.
Write to this register initiates internal offset calibration cycle (see Offset Calibration).
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | TRIG_OFFCAL |
R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | W-0b |
LEGEND: R/W = Read/Write; R = Read only; W = Write only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | RESERVED | R | 0000000b | Reserved Bits. Read returns 0000000b |
0 | TRIG_OFFCAL | W | 0b | Writing 1 into this bit triggers internal offset calibration. |