ZHCSCQ1B October   2013  – August 2014 ADS7253 , ADS7853 , ADS8353

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: ADS8353
    6. 7.6  Electrical Characteristics: ADS7853
    7. 7.7  Electrical Characteristics: ADS7253
    8. 7.8  Electrical Characteristics: All Devices
    9. 7.9  Timing Requirements: Interface Mode
    10. 7.10 Timing Characteristics: Serial Interface
    11. 7.11 Typical Characteristics: ADS8353
    12. 7.12 Typical Characteristics: ADS7853
    13. 7.13 Typical Characteristics: ADS7253
    14. 7.14 Typical Characteristics: Common to ADS8353, ADS7853, and ADS7253
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Reference
      2. 8.3.2 Analog Inputs
        1. 8.3.2.1 Analog Input: Full-Scale Range Selection
        2. 8.3.2.2 Analog Input: Single-Ended and Pseudo-Differential Configurations
      3. 8.3.3 Transfer Function
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps and Serial Interface
      1. 8.5.1 Serial Interface
      2. 8.5.2 Write to User Programmable Registers
        1. 8.5.2.1 Configuration Register (CFR)
        2. 8.5.2.2 REFDAC Registers (REFDAC_A and REFDAC_B)
      3. 8.5.3 Data Read Operation
        1. 8.5.3.1 Reading User-Programmable Registers
        2. 8.5.3.2 Conversion Data Read
          1. 8.5.3.2.1 32-CLK, Dual-SDO Mode (CFR.B11 = 0, CFR.B10 = 0, Default)
          2. 8.5.3.2.2 32-CLK, Single-SDO Mode (CFR.B11 = 0, CFR.B10 = 1)
          3. 8.5.3.2.3 16-CLK, Dual-SDO Mode (CFR.B11 = 1, CFR.B10 = 0)
          4. 8.5.3.2.4 16-CLK, Single-SDO Mode (CFR.B11 = 1, CFR.B10 = 1)
      4. 8.5.4 Low-Power Modes
        1. 8.5.4.1 STANDBY Mode
        2. 8.5.4.2 Software Power-Down (SPD) Mode
      5. 8.5.5 Frame Abort, Reconversion, or Short-Cycling
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Amplifier Selection
      2. 9.1.2 Antialiasing Filter
    2. 9.2 Typical Applications
      1. 9.2.1 DAQ Circuit to Achieve Maximum SINAD for a 10-kHz Input Signal at Full Throughput
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 DAQ Circuit to Achieve Maximum SINAD for a 100-kHz Input Signal at Full Throughput
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 相关链接
    2. 12.2 相关文档　
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 术语表
  13. 13机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Device Comparison Table

PRODUCT RESOLUTION (Bits) INPUT CONFIGURATION NMC (Bits) INL (LSB) SNR (dB)
ADS8354 16 Fully-differential 16 ±2.5 93 (typ)
ADS7854 14 Fully-differential 14 ±1.5 88 (typ)
ADS7254 12 Fully-differential 12 ±1 74 (typ)
ADS8353 16 Single-ended and
pseudo-differential		 16 ±2.5 89 (typ)
ADS7853 14 Single-ended and
pseudo-differential		 14 ±2 84 (typ)
ADS7253 12 Single-ended and
pseudo-differential		 12 ±1 73.5 (typ)
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