米6体育平台手机版

ZHCSIJ3C June 2008 – July 2018 ADS7950 , ADS7951 , ADS7952 , ADS7953 , ADS7954 , ADS7955 , ADS7956 , ADS7957 , ADS7958 , ADS7959 , ADS7960 , ADS7961

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

RGE|24
DBT|30

散热焊盘机械数据 (封装 | 引脚)

RGE|24
- QFND136Y

订购信息

7.9 Timing Requirements

All specifications typical at –40°C to 125°C, +VA = 2.7 V to 5.25 V (unless otherwise specified)⁽¹⁾⁽²⁾ (see Figure 1, Figure 2, Figure 3, and Figure 4)

			MIN	MAX	UNIT
t_conv	Conversion time	+VBD = 1.8 V		16	SCLK
		+VBD = 3 V		16
		+VBD = 5 V		16
t_q	Minimum quiet sampling time needed from bus 3-state to start of next conversion	+VBD = 1.8 V	40		ns
		+VBD = 3 V	40
		+VBD = 5 V	40
t_d1	Delay time, CS low to first data (DO–15) out	+VBD = 1.8 V		38	ns
		+VBD = 3 V		27
		+VBD = 5 V		17
t_su1	Setup time, CS low to first rising edge of SCLK	+VBD = 1.8 V	8		ns
		+VBD = 3 V	6
		+VBD = 5 V	4
t_d2	Delay time, SCLK falling to SDO next data bit valid	+VBD = 1.8 V		35	ns
		+VBD = 3 V		27
		+VBD = 5 V		17
t_h1	Hold time, SCLK falling to SDO data bit valid	+VBD = 1.8 V	7		ns
		+VBD = 3 V	5
		+VBD = 5 V	3
t_d3	Delay time, 16^th SCLK falling edge to SDO 3-state	+VBD = 1.8 V		26	ns
		+VBD = 3 V		22
		+VBD = 5 V		13
t_su2	Setup time, SDI valid to rising edge of SCLK	+VBD = 1.8 V	2		ns
		+VBD = 3 V	3
		+VBD = 5 V	4
t_h2	Hold time, rising edge of SCLK to SDI valid	+VBD = 1.8 V	12		ns
		+VBD = 3 V	10
		+VBD = 5 V	6
t_w1	Pulse duration CS high	+VBD = 1.8 V	20		ns
		+VBD = 3 V	20
		+VBD = 5 V	20
t_d4	Delay time CS high to SDO 3-state	+VBD = 1.8 V		24	ns
		+VBD = 3 V		21
		+VBD = 5 V		12
t_wh	Pulse duration SCLK high	+VBD = 1.8 V	20		ns
		+VBD = 3 V	20
		+VBD = 5 V	20
t_wl	Pulse duration SCLK low	+VBD = 1.8 V	20		ns
		+VBD = 3 V	20
		+VBD = 5 V	20
	Frequency SCLK	+VBD = 1.8 V		20	MHz
		+VBD = 3 V		20
		+VBD = 5 V		20

(1) 1.8V specifications apply from 1.7 V to 1.9 V, 3 V specifications apply from 2.7 V to 3.6 V, 5 V specifications apply from 4.75 V to 5.25 V.

(2) With 50-pF load

ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955 ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961 t_dia_las605.gif

Figure 1. Device Operation Timing Diagram

ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955 ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961 t12_dia_las605.gif

Figure 2. Serial Interface Timing Diagram for 12-Bit Devices (ADS7950/51/52/53)

ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955 ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961 tim_10b_las605.gif

Figure 3. Serial Interface Timing Diagram for 10-Bit Devices (ADS7954/55/56/57)

ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955 ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961 tim_8b_las605.gif

Figure 4. Serial Interface Timing Diagram for 8-Bit Devices (ADS7958/59/60/61)