In this mode the internal channel sequencer selectively scans channels from AIN0 through AIN7 in any order as defined by a user-programmable look-up table. Table 6-4 describes the configurability of this look-up table. Configure the device in custom channel sequencing mode by programming the SEQ_MODE[1:0] bits to 11b in the DEVICE_CFG register using a 3-byte register access. Table 6-4 shows that the channel scanning sequence is programmed by configuring the channel IDs in the register as space. A channel sample count is also programmed and associated with every channel ID. By default the channel sample count is 1, which means the sequence executes in the order of programmed channel IDs. If the channel sample count is greater than 1 then the corresponding channel is sampled and converted for a programmed number of times before switching to the next channel.

For application-specific scanning requirements, use start and stop pointers to define the channel scanning sequence. Program the start index in the CCS_START_INDEX register and the stop index in the CCS_END_INDEX register. Table 6-4 shows that the 4-bit index corresponds to the configuration index. The sequence starts executing from the index programmed in CCS_START_INDEX (default 0) and stop or loop-back from CCS_STOP_INDEX (default 15). The channel scanning sequence is looped-back to the start index from the stop index by setting the CCS_SEQ_LOOP register to 1b.

After configuring the channel scanning order, start index, and stop index, initiate the scanning by setting the SEQ_START bit to 1b. The ADC scans through the enabled channels after every CS rising edge as defined by the channel scanning order. When SEQ_START is set to 1b, the SDO-1/SEQSTS pin is pulled high until the last channel conversion frame is complete, as described in Figure 6-14. As illustrated in Figure 6-15, channel AIN0 is selected and SEQSTS/SDO-1 goes to Hi-Z after the last enabled channel conversion is complete.

As an example, Figure 6-15 provides a timing diagram for when the channel configuration is set as in Table 6-5. When AIN6 is converted, SEQSTS/SDO-1 goes to Hi-Z and AIN0 is selected as the active channel. If more conversion frames are launched at the end of the sequence, the device returns valid data corresponding to AIN0.

To use the device in easy capture mode follow these steps:

• Set the SEQ_MODE[1:0] bits in the DEVICE_CFG register to 3.
• Configure the channel sequence by setting registers 0x000C to 0x002B.
• Configure the CCS_START_INDEX and the CCS_END_INDEX registers. In Figure 6-15, CCS_START_INDEX = 0 and CCS_STOP_INDEX = 1.
• Configure the CCS_SEQ_LOOP register to 1 to indefinitely loop the sequence. In Figure 6-15, the CCS_SEQ_LOOP register = 0b.
• Set the SEQ_START register to 1b to start executing the sequence.