8.2.2.2.2 ADC Input Driver

Refer to ADC Input Driver section for the detailed design procedure for an ADC input driver.

The application circuit shown in Figure 60 is optimized to achieve lowest distortion and lowest noise for a 100-kHz input signal. The input signal is processed through a high-bandwidth, low-distortion amplifier in an inverting gain configuration and a low-pass RC filter before being fed into the ADS8350 operating at 750-kSPS throughput.

As a rule of thumb, the distortion from the input driver should be at least 10 dB less than the ADC distortion. The distortion resulting from variation in the common-mode signal is eliminated by using the amplifier in an inverting gain configuration that establishes a fixed common-mode level for the circuit. This configuration also eliminates the requirement of a rail-to-rail swing at the input of the amplifier. The THS4032, used as an input driver, provides exceptional ac performance because of its extremely low-distortion, low-noise, and high-bandwidth specifications. The ADC AINM pin is also driven to V_REF with the same amplifier to match the source impedance and to take full advantage of the pseudo-differential input structure of the ADC. In addition, the components of the antialiasing filter are such that the noise from the front-end circuit is kept low without adding distortion to the input signal.