BUSY is an active-high digital output signal . This pin goes to logic high after the rising edges of both the CONVSTA and CONVSTB signals, indicating that the front-end, track-and-hold circuits for all input channels are in hold mode and that the ADC conversion has started. When the BUSY signal goes high, any activity on the CONVSTA or CONVSTB inputs has no effect on the device. The BUSY output remains high until the conversion process for all channels is completed and the conversion data are latched into the output data registers for read out. If the conversion data are read for the previous conversion when BUSY is high, ensure that the data read operation is complete before the falling edge of the BUSY output.