ZHCSFS8A December   2016  – April 2017 ADS8588S

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Family Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: CONVST Control
    7. 7.7  Timing Requirements: Data Read Operation
    8. 7.8  Timing Requirements: Parallel Data Read Operation, CS and RD Tied Together
    9. 7.9  Timing Requirements: Parallel Data Read Operation, CS and RD Separate
    10. 7.10 Timing Requirements: Serial Data Read Operation
    11. 7.11 Timing Requirements: Byte Mode Data Read Operation
    12. 7.12 Timing Requirements: Oversampling Mode
    13. 7.13 Timing Requirements: Exit Standby Mode
    14. 7.14 Timing Requirements: Exit Shutdown Mode
    15. 7.15 Switching Characteristics: CONVST Control
    16. 7.16 Switching Characteristics: Parallel Data Read Operation, CS and RD Tied Together
    17. 7.17 Switching Characteristics: Parallel Data Read Operation, CS and RD Separate
    18. 7.18 Switching Characteristics: Serial Data Read Operation
    19. 7.19 Switching Characteristics: Byte Mode Data Read Operation
    20. 7.20 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs
      2. 8.3.2 Analog Input Impedance
      3. 8.3.3 Input Clamp Protection Circuit
      4. 8.3.4 Programmable Gain Amplifier (PGA)
      5. 8.3.5 Third-Order, Low-Pass Filter (LPF)
      6. 8.3.6 ADC Driver
      7. 8.3.7 Digital Filter and Noise
      8. 8.3.8 Reference
        1. 8.3.8.1 Internal Reference
        2. 8.3.8.2 External Reference
        3. 8.3.8.3 Supplying One VREF to Multiple Devices
      9. 8.3.9 ADC Transfer Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Interface: Pin Description
        1. 8.4.1.1  REFSEL (Input)
        2. 8.4.1.2  RANGE (Input)
        3. 8.4.1.3  STBY (Input)
        4. 8.4.1.4  PAR/SER/BYTE SEL (Input)
        5. 8.4.1.5  CONVSTA, CONVSTB (Input)
        6. 8.4.1.6  RESET (Input)
        7. 8.4.1.7  RD/SCLK (Input)
        8. 8.4.1.8  CS (Input)
        9. 8.4.1.9  OS[2:0]
        10. 8.4.1.10 BUSY (Output)
        11. 8.4.1.11 FRSTDATA (Output)
        12. 8.4.1.12 DB15/BYTE SEL
        13. 8.4.1.13 DB14/HBEN
        14. 8.4.1.14 DB[13:9]
        15. 8.4.1.15 DB8/DOUTB
        16. 8.4.1.16 DB7/DOUTA
        17. 8.4.1.17 DB[6:0]
      2. 8.4.2 Device Modes of Operation
        1. 8.4.2.1 Power-Down Modes
          1. 8.4.2.1.1 Standby Mode
          2. 8.4.2.1.2 Shutdown Mode
        2. 8.4.2.2 Conversion Control
          1. 8.4.2.2.1 Simultaneous Sampling on All Input Channels
          2. 8.4.2.2.2 Simultaneous Sampling Two Sets of Input Channels
        3. 8.4.2.3 Data Read Operation
          1. 8.4.2.3.1 Parallel Data Read
          2. 8.4.2.3.2 Parallel Byte Data Read
          3. 8.4.2.3.3 Serial Data Read
          4. 8.4.2.3.4 Data Read During Conversion
        4. 8.4.2.4 Oversampling Mode of Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 8-Channel, Data Acquisition System (DAQ) for Power Automation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Device Family Comparison Table

PRODUCT RESOLUTION (Bits) CHANNELS SAMPLE RATE (kSPS)
ADS8588S 16 8, single-ended 200
ADS8586S 16 6, single-ended 250
ADS8584S 16 4, single-ended 330
ADS8578S 14 8, single-ended 200
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