ZHCSBG4B
May 2013 – February 2019
ADS8862
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
ADC 电源无需独立的 LDO
4
修订历史记录
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: 3-Wire Operation
7.7
Timing Requirements: 4-Wire Operation
7.8
Timing Requirements: Daisy-Chain
7.9
Typical Characteristics
8
Parameter Measurement Information
8.1
Equivalent Circuits
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Analog Input
9.3.2
Reference
9.3.3
Clock
9.3.4
ADC Transfer Function
9.4
Device Functional Modes
9.4.1
CS Mode
9.4.1.1
3-Wire CS Mode Without a Busy Indicator
9.4.1.2
3-Wire CS Mode With a Busy Indicator
9.4.1.3
4-Wire CS Mode Without a Busy Indicator
9.4.1.4
4-Wire CS Mode With a Busy Indicator
9.4.2
Daisy-Chain Mode
9.4.2.1
Daisy-Chain Mode Without a Busy Indicator
9.4.2.2
Daisy-Chain Mode With a Busy Indicator
10
Application and Implementation
10.1
Application Information
10.1.1
ADC Reference Driver
10.1.2
ADC Input Driver
10.1.2.1
Input Amplifier Selection
10.1.2.2
Charge-Kickback Filter
10.2
Typical Applications
10.2.1
DAQ Circuit for a 1.5-µs, Full-Scale Step Response
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedure
10.2.2
DAQ Circuit for Lowest Distortion and Noise Performance at 680 kSPS
10.2.2.1
Design Requirements
10.2.2.2
Detailed Design Procedure
10.2.3
Ultralow-Power DAQ Circuit at 10 kSPS
10.2.3.1
Design Requirements
10.2.3.2
Detailed Design Procedure
11
Power Supply Recommendations
11.1
Power-Supply Decoupling
11.2
Power Saving
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
器件和文档支持
13.1
文档支持
13.1.1
相关文档
13.2
接收文档更新通知
13.3
社区资源
13.4
商标
13.5
静电放电警告
13.6
术语表
14
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
DGS|10
MPDS035C
DRC|10
MPDS117L
散热焊盘机械数据 (封装 | 引脚)
DRC|10
QFND213I
订购信息
zhcsbg4b_oa
zhcsbg4b_pm
10.2.1
DAQ Circuit for a
1.5-µs
, Full-Scale Step Response
Figure 63.
DAQ Circuit for a
1.5-µs
, Full-Scale Step Response
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