The device has two separate power supplies: AVDD and DVDD. The internal circuits of the device operate on AVDD; DVDD is used for the digital interface. AVDD and DVDD can be independently set to any value within the permissible range.

11.1 Power-Supply Decoupling

Decouple the AVDD and DVDD pins with GND, using individual 1-µF decoupling capacitors placed in close proximity to the pin, as shown in Figure 74.

Figure 74. Supply Decoupling

11.2 Power Saving

The device has an auto power-down feature that powers down the internal circuitry at the end of every conversion. Referring to Figure 75, the input signal is acquired on the sampling capacitors when the device is in a power-down state (t_acq); at the same time, the result for the previous conversion is available for reading. The device powers up on the start of the next conversion. During conversion phase (t_conv), the device also consumes current from the reference source (connected to the REF pin).

Figure 75. Power Scaling With Throughput

The conversion time, t_conv, is independent of the SCLK frequency. When operating the device at speeds lower than the maximum rated throughput, the conversion time, t_conv, does not change; the device spends more time in power-down state. Therefore, as shown in Figure 76, the device power consumption from the AVDD supply and the external reference source is directly proportional to the speed of operation. Extremely low AVDD power-down current (50 nA, typical) and extremely low external reference leakage current (250 nA, typical), make this device ideal for very low throughput applications (such as pulsed measurements).

Figure 76. Power Scaling With Throughput