7.1 Overview

The ADS891xB is a family of high-speed, successive approximation register (SAR), analog-to-digital converters (ADC) based on a charge redistribution architecture. These compact devices integrate a reference buffer and LDO, and feature high performance at a high throughput rate with low power consumption.

This device family supports unipolar, fully differential, analog input signals. The integrated reference buffer supports the burst mode of data acquisition for external reference voltages in the range 2.5 V to 5 V, and offers a wide selection of input ranges without additional input scaling.

When a conversion is initiated, the differential input between the AINP and AINM pins is sampled on the internal capacitor array. The device uses an internal clock to perform conversions. During the conversion process, both analog inputs are disconnected from the internal circuit. At the end of conversion process, the device reconnects the sampling capacitors to the AINP and AINM pins and enters an acquisition phase.

The integrated LDO allows the device to operate on a single supply, RV_DD. The device consumes only 21 mW, 16 mW, or 14 mW of power when operating at the rated maximum throughput of 1 MSPS, 500 kSPS, or 250 kSPS, respectively, with the internal reference buffer and LDO enabled.

The enhanced multiSPI™ digital interface is backward-compatible with traditional SPI protocol. Configurable features simplify board layout, timing, and firmware, and support high throughput at lower clock speeds, thus allowing an easy interface with a variety of microcontrollers, DSPs, and FPGAs.

The ADS891xB enables test and measurement, medical, and industrial applications to achieve fast, low-noise, low-distortion, low-power data acquisition in small form factors.