7.5.1 Output Data Word

In any data transfer frame, the contents of an internal, 22-bit, output data word are shifted out on the SDO pins. The D[21:6] bits of the 22-bit output data word for any frame F + 1, are determined by:

• Value of the DATA_VAL bit applicable to frame F + 1 (see the DATA_CNTL register)
• The command issued in frame F

If a valid RD_REG command is executed in frame F, then the D[21:14] bits in frame F + 1 reflect the contents of the selected register, and the D[13:0] bits are zeros.

If the DATA_VAL bit for frame F + 1 is set to 1, then the D[21:6] bits in frame F + 1 are replaced by the DATA_PATN[15:0] bits.

For all other combinations, the D[21:6] bits for frame F + 1 are the latest conversion result.

Figure 43 shows the output data word. Figure 44 shows further details of the parity computation unit illustrated in Figure 43.

Figure 43. Output Data Word (D[21:0])

Figure 44. Parity Bits Computation

With the PAR_EN bit set to 0, the D[5] and D[4] bits of the output data word are set to 0 (default configuration).

When the PAR_EN bit is set to 1, the device calculates the parity bits (FLPAR and FTPAR) and appends them as bits D[5] and D[4].

• FLPAR is the even parity calculated on bits D[21:6].
• FTPAR is the even parity calculated on the bits defined by FPAR_LOC[1:0].

See the DATA_CNTL register for more details on the FPAR_LOC[1:0] bit settings. Bits D[3:0] are set to 0000b.