The ADS981x features a high-speed CMOS serial interface for ADC data output. ADC data are launched on D[3:0] and the corresponding data clock is launched on DCLKOUT. The DCLKOUT frequency is 192 MHz for 2 MSPS/channel sampling rate (24 SMPL_CLK bits and an 8-MHz SMPL_CLK rate).

High-speed CMOS switching can create ground bounce that adversely impacts the SNR of the ADC. Ground bounce increments with increases in PCB trace capacitance. Minimize the PCB trace length for D[3:0] and DCLKOUT. Place a CMOS buffer, with low input capacitance, close to the ADS981x to minimize the effect of CMOS switching noise.