The SPI_READ register bit must be first set to 1 before reading from a register. The AFE4403 includes a mode where the contents of the internal registers can be read back on the SPISOMI pin. This mode may be useful as a diagnostic check to verify the serial interface communication between the external controller and the AFE. To enable this mode, first set the SPI_READ register bit using the SPI write command, as described in the Writing Data section. In the next command, specify the SPI register address with the desired content to be read. Within the same SPI command sequence, the AFE outputs the contents of the specified register on the SPISOMI pin. Figure 8-35 shows an SPI timing diagram for a single read operation. For multiple read and write cycles, refer to the Multiple Data Reads and Writes section.

The SPI_READ register bit must be enabled before attempting a serial readout from the AFE.

Specify the register address of the content that must be readback on bits A[7:0].

The AFE outputs the contents of the specified register on the SPISOMI pin.

Figure 8-35 AFE SPI Read Timing Diagram