ZHCSCL7C May   2014  – April 2021 AFE4403

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Family Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Requirements: Supply Ramp and Power-Down
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Receiver Channel
        1. 8.3.1.1 Receiver Front-End
        2. 8.3.1.2 Ambient Cancellation Scheme and Second Stage Gain Block
        3. 8.3.1.3 Receiver Control Signals
        4. 8.3.1.4 Receiver Timing
      2. 8.3.2 Clocking and Timing Signal Generation
      3. 8.3.3 Timer Module
        1. 8.3.3.1 Using the Timer Module
      4. 8.3.4 Receiver Subsystem Power Path
      5. 8.3.5 Transmit Section
        1. 8.3.5.1 Third LED Support
        2. 8.3.5.2 Transmitter Power Path
        3. 8.3.5.3 LED Power Reduction During Periods of Inactivity
        4. 8.3.5.4 LED Configurations
    4. 8.4 Device Functional Modes
      1. 8.4.1 ADC Operation and Averaging Module
        1. 8.4.1.1 Operation Without Averaging
        2. 8.4.1.2 Operation With Averaging
        3. 8.4.1.3 Dynamic Power-Down Mode
      2. 8.4.2 Diagnostics
        1. 8.4.2.1 Photodiode-Side Fault Detection
        2. 8.4.2.2 Transmitter-Side Fault Detection
        3. 8.4.2.3 Diagnostics Module
    5. 8.5 Programming
      1. 8.5.1 Serial Programming Interface
      2. 8.5.2 Reading and Writing Data
        1. 8.5.2.1 Writing Data
        2. 8.5.2.2 Reading Data
        3. 8.5.2.3 Multiple Data Reads and Writes
        4. 8.5.2.4 Register Initialization
        5. 8.5.2.5 AFE SPI Interface Design Considerations
    6. 8.6 Register Maps
      1. 8.6.1 AFE Register Map
      2. 8.6.2 AFE Register Description
  9. Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Consumption Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 静电放电警告
    3. 12.3 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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订购信息

Pin Configuration and Functions

GUID-ADBE0278-9732-4CBF-982B-AC90D8B17BA4-low.png Figure 6-1 YZP Package,DSBGA-36,(Bottom View)
Table 6-1 Pin Functions
PIN FUNCTION DESCRIPTION
NAME NO.
ADC_RDY D5 Digital Output signal that indicates ADC conversion completion.
Can be connected to the interrupt input pin of an external microcontroller.
AFE_ PDN C3 Digital AFE-only power-down input; active low.
Can be connected to the port pin of an external microcontroller.
BG C2 Reference Decoupling capacitor for internal band-gap voltage to ground.
Connect a decoupling capacitor to ground.
To achieve the lowest transmitter noise, use a capacitor value of 2.2 µF.
To reduce the recovery time from power-down (from 1 s to 0.1 s), use a capacitor value of
0.1 µF instead—but with slightly degraded transmitter noise.
CLKOUT E6 Digital Buffered 4-MHz output clock output.
Can be connected to the clock input pin of an external microcontroller.
DIAG_END B4 Digital Output signal that indicates completion of diagnostics.
Can be connected to the port pin of an external microcontroller.
DNC(1) C1, A1, E3, D3, F5, B5, B6 Do not connect these pins. Leave as open circuit.
INN F1 Analog Receiver input pin. Connect to photodiode anode.
INP E1 Analog Receiver input pin. Connect to photodiode cathode.
LED_DRV_GND A3 Supply LED driver ground pin, H-bridge. Connect to common board ground.
LED_DRV_SUP A6 Supply LED driver supply pin, H-bridge. Connect to an external power supply capable of supplying the large LED current, which is drawn by this supply pin.
RESET D4 Digital AFE-only reset input, active low.
Can be connected to the port pin of an external microcontroller
RX_ANA_GND E2 Supply Rx analog ground pin. Connect to common board ground.
RX_ANA_SUP F2, E4 Supply Rx analog supply pin; 0.1-µF decoupling capacitor to ground
RX_DIG_GND B2, F6 Supply Rx digital ground pin. Connect to common board ground.
RX_DIG_SUP E5 Supply Rx digital supply pin; 0.1-µF decoupling capacitor to ground
SCLK C6 SPI SPI clock pin
SPISIMO C4 SPI SPI serial in master out
SPISOMI C5 SPI SPI serial out master in
SPISTE D6 SPI SPI serial interface enable
TX_CTRL_SUP A2 Supply Transmit control supply pin (0.1-µF decoupling capacitor to ground)
TX_REF B1 Reference Transmitter reference voltage, 0.25 V default after reset.
Connect a decoupling capacitor to ground.
To achieve the lowest transmitter noise, use a capacitor value of 2.2 µF.
To reduce the recovery time from power-down (from 1 s to 0.1 s), use a capacitor value of
0.1 µF instead—but with slightly degraded transmitter noise.
TXN A4 Analog LED driver out. Connect to LED in common anode or H-bridge configuration.
TXP A5 Analog LED driver out. Connect to LED in common anode or H-bridge configuration.
TX3 B3 Analog LED driver out for third LED. Connect to optional third LED supported in common anode configuration.
VCM D1 Reference Input common-mode voltage output.
This signal can be used to shield (guard) the INP, INN traces.
If used as a shield, then connect a series resistor (1 kΩ) and a decoupling capacitor (10 nF) to ground.
If VCM is not used externally, then these external components are not required.
VSS D2 Supply Substrate ground. Connect to common board ground.
XOUT F4 Digital Crystal oscillator pins.
Connect an external crystal between these pins with the correct load capacitor
(as specified by vendor) to ground.
XIN F3 Digital Crystal oscillator pins.
Connect an external crystal between these pins with the correct load capacitor
(as specified by vendor) to ground.
Leave pins as open circuit. Do not connect.