SBASAC2 june 2023 AFE43902-Q1 , AFE53902-Q1
PRODUCTION DATA
The AFEx3902-Q1 have five digital I/O pins that control I2C, SPI, PWM, and mode selection. The VREF/MODE pin must be at logic low to enable the programming interface. These devices automatically detect I2C and SPI protocols at the first successful communication after power-on, and then connect to the detected interface. After an interface protocol is connected, any change in the protocol is ignored. The I2C interface uses the A0 pin to select from among four address options. The SPI is a three-wire interface by default. No readback capability is available in three-wire SPI mode. The NC/SDO pin can be configured as the SDO function in the register map and then programmed into the NVM. With the NC/SDO pin acting as SDO, the SPI works as a four-wire interface. The SPI readback mode is slower than the write mode. The programming interface pins are: