The AFEx3902-Q1 contain nonvolatile memory (NVM) bits. These memory bits are user programmable and erasable, and retain set values in the absence of a power supply. The highlighted gray cells in the Register Map show all the register bits that can be stored in the NVM by setting NVM-PROG = 1 in the COMMON-TRIGGER register. The NVM-PROG bit autoresets. The NVM-BUSY bit in the GENERAL-STATUS register is set to 1 by the device when an NVM write or reload operation is ongoing. During this time, the device blocks all read and write operations from and to the device. The NVM-BUSY bit is set to 0 after the write or reload operation is complete; at this point, all read and write operations from and to the device are allowed. The default value for all the registers in the AFEx3902-Q1 is loaded from NVM as soon as a POR event is issued.

The AFEx3902-Q1 also implements a NVM-RELOAD bit in the COMMON-TRIGGER register. Set this bit to 1 for the device to start an NVM-reload operation. The NVM-reload operation overwrites the register map with the stored data from the NVM. After completion, the device autoresets this bit to 0. During the NVM-RELOAD operation, the NVM-BUSY bit is set to 1.