Power-down mode facilitates rapid turn-off of the voltage at the DAC output. The DAC can be set to enter and exit power-down mode through hardware, software, or automatically in response to an alarm event. The DAC output is specified for glitch-free performance when going into and out of power-down mode.

Power-down mode is also be enabled by setting DAC_CFG.PD to 1. In power-down mode, the DAC output amplifier powers down and the DAC output pin is put into the Hi-Z configuration. The DAC output remains in power-down mode until the DAC output is re-enabled.

Alarm control of the power-down mode is enabled by setting the alarm events as DAC power-down sources. The alarm events that trigger the DAC output power-down state must be specified in the ALARM_ACT register. After the alarm bit is cleared, the DAC returns to normal operation, as long as no other power-down controlling alarm event has been triggered.

The DAC register does not change when the DAC enters power-down mode, which enables the device to return to the original operating point after return from the power-down mode. Additionally, the DAC register can be updated while the DAC is in power-down mode, thus allowing the DAC to output a new value upon return to normal operation.