ZHCSP80 December   2022 AFE78101 , AFE88101

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements
    7. 6.7  Timing Diagrams
    8. 6.8  Typical Characteristics: VOUT DAC
    9. 6.9  Typical Characteristics: ADC
    10. 6.10 Typical Characteristics: Reference
    11. 6.11 Typical Characteristics: Power Supply
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital-to-Analog Converter (DAC) Overview
        1. 7.3.1.1 DAC Resistor String
        2. 7.3.1.2 DAC Buffer Amplifier
        3. 7.3.1.3 DAC Transfer Function
        4. 7.3.1.4 DAC Gain and Offset Calibration
        5. 7.3.1.5 Programmable Slew Rate
        6. 7.3.1.6 DAC Register Structure and CLEAR State
      2. 7.3.2 Analog-to-Digital Converter (ADC) Overview
        1. 7.3.2.1 ADC Operation
        2. 7.3.2.2 ADC Custom Channel Sequencer
        3. 7.3.2.3 ADC Synchronization
        4. 7.3.2.4 ADC Offset Calibration
        5. 7.3.2.5 External Monitoring Inputs
        6. 7.3.2.6 Temperature Sensor
        7. 7.3.2.7 Self-Diagnostic Multiplexer
        8. 7.3.2.8 ADC Bypass
      3. 7.3.3 Programmable Out-of-Range Alarms
        1. 7.3.3.1 Alarm Action Configuration Register
        2. 7.3.3.2 Alarm Voltage Generator
        3. 7.3.3.3 Temperature Sensor Alarm Function
        4. 7.3.3.4 Internal Reference Alarm Function
        5. 7.3.3.5 ADC Alarm Function
        6. 7.3.3.6 Fault Detection
      4. 7.3.4 IRQ
      5. 7.3.5 Internal Reference
      6. 7.3.6 Integrated Precision Oscillator
      7. 7.3.7 One-Time Programmable (OTP) Memory
    4. 7.4 Device Functional Modes
      1. 7.4.1 DAC Power-Down Mode
      2. 7.4.2 Reset
    5. 7.5 Programming
      1. 7.5.1 Communication Setup
        1. 7.5.1.1 SPI Mode
        2. 7.5.1.2 UART Mode
      2. 7.5.2 Serial Peripheral Interface (SPI)
        1. 7.5.2.1 SPI Frame Definition
        2. 7.5.2.2 SPI Read and Write
        3. 7.5.2.3 Frame Error Checking
        4. 7.5.2.4 Synchronization
      3. 7.5.3 UART
        1. 7.5.3.1 UART Break Mode (UBM)
      4. 7.5.4 Status Bits
      5. 7.5.5 Watchdog Timer
    6. 7.6 Register Maps
      1. 7.6.1 AFEx8101 Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Multichannel Configuration
    2. 8.2 Typical Application
      1. 8.2.1 4-mA to 20-mA Current Transmitter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Start-Up Circuit
          2. 8.2.1.2.2 Current Loop Control
          3. 8.2.1.2.3 Input Protection and Rectification
          4. 8.2.1.2.4 System Current Budget
        3. 8.2.1.3 Application Curves
    3. 8.3 Initialization Set Up
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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7.3.2.7 Self-Diagnostic Multiplexer

In addition to the ADC offset, the two external monitoring inputs, and the temperature sensor, the ADC of the AFEx8101 has five other internal inputs to monitor the reference voltage, the power supplies, a static voltage, and the DAC output. These five voltages measurements are part of the self-diagnostic multiplexer (SD0 to SD4) measurements of the ADC, and are reported in the ADC_SD_MUX register at 27h; see also Section 7.6.

Channel 4 (SD0) measures the reference voltage of the device. The ADC measures the reference voltage through a resistor divider (divide by two). Be aware that all ADC measurements are a function of the reference; using SD0 to measure the reference is not revealing as a diagnostic measurement. The data rate for this conversion is 2560 Hz and the range of the ADC is set to VREF.

Channel 5 (SD1) measures the PVDD power supply of the device. The ADC measures the PVDD voltage through a resistor divider (divide by six). The data rate for this conversion is 2560 Hz and the range of the ADC is set to VREF.

Channel 6 (SD2) measures the VDD power supply of the device. When channel 6 is selected, the ADC measures the VDD voltage through a resistor divider (divide by 2). The data rate for this conversion is 2560 Hz and the range of the ADC is set to VREF.

Channel 7 (SD3) is a ZTAT (zero temperature coefficient) voltage. This internal voltage is nominally 0.6 V with a low temperature drift and does not depend on the reference voltage. An ADC measurement of ZTAT voltage can be useful to determine the state of the reference voltage. The data rate for this conversion is 2560 Hz and the range of the ADC is set to VREF.

Channel 8 (SD4) measures the VOUT of the DAC. The ADC measures the VOUT voltage through a resistor divider (divide by two). The data rate for this conversion is 2560 Hz.

The input range for the DAC voltage monitoring input is scaled from either 0-V to 2.5-V or 0-V to 1.25-V, depending on PVDD voltage. As soon as the PVDD voltage exceeds 2.7 V, the input range for the DAC voltage monitoring automatically switches to the 0-V to 2.5-V range. The DAC voltage conversion values are stored in straight-binary format in the ADC registers. The ADC resolution for these channels is computed by Equation 7.
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