Typical values at T_A = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52MSPS, f_DAC = 11796.48MSPS (24x interpolation), interleave mode, 1^st Nyquist zone output, PLL clock mode with f_REF = 491.52MHz, A_OUT = –1 dBFS, DSA = 0dB, Sin(x)/x enabled, DSA calibrated

including PCB and cable losses, Aout = -0.5dFBS, DSA = 0, 1.8GHz matching

Figure 4-44 TX Output Fullscale vs Output Frequency

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1

Figure 4-46 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)

Figure 4-48 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1

Figure 4-50 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)

Figure 4-52 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)

Figure 4-54 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 4-56 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)

Figure 4-58 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz, channel with the median variation over DSA setting at 25°C

Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 4-60 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz, POUT = –13dBFS

Figure 4-62 TX Output Noise vs Channel and Attenuation at 1.8GHz

fDAC = 11796.48MSPS, interleave mode, fCENTER = 1.8GHz, matching at 1.8GHz, –13dBFS each tone

Figure 4-64 TX IMD3 vs Tone Spacing and Channel at 1.8GHz

fDAC = 11796.48MSPS, interleave mode, fCENTER = 1.8GHz, fSPACING = 20MHz, matching at 1.8GHz

Figure 4-66 TX IMD3 vs Digital Level at 1.8GHz

TM1.1, POUT_RMS = –13dBFS

Figure 4-68 TX 20-MHz LTE Output Spectrum at 1.8425GHz

Matching at 1.8GHz, single carrier 20MHz BW TM1.1 LTE

Figure 4-70 TX 20MHz LTE alt-ACPR vs Digital Level at 1.8425GHz

Matching at 1.8GHz, single carrier 20MHz BW TM1.1 LTE

Figure 4-72 TX 20MHz LTE alt-ACPR vs DSA at 1.8GHz

Matching at 1.8GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 4-74 TX HD3 vs Digital Amplitude and Output Frequency at 1.8GHz

fDAC = 8847.36MSPS, straight mode, 1.8GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.

Figure 4-76 TX Single Tone (–6 dBFS) Output Spectrum at 1.8GHz (0-f_DAC)

Aout = -0.5dFBS, matching 1.8GHz

Figure 4-45 TX Output Power vs Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1

Figure 4-47 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)

Figure 4-49 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1

Figure 4-51 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)

Figure 4-53 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 8847.36MSPS, straight mode, matching at 2.6GHz

Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)

Phase DNL spike may occur at any DSA setting.

Figure 4-55 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz

Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 4-57 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz, channel with the median variation over DSA setting at 25°C

Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)

Figure 4-59 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 5898.24MSPS, interleave mode, matching at 1.8GHz, channel with the median variation over DSA setting at 25°C

Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 4-61 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 1.8GHz

fDAC = 11796.48 MSPS, interleave mode, fCENTER = 1.8GHz, matching at 1.8GHz, –13dBFS each tone

Figure 4-63 TX IMD3 vs DSA Setting at 1.8GHz

fDAC = 11796.48MSPS, interleave mode, fCENTER = 1. GHz, matching at 1.8GHz, –13dBFS each tone, worst channel

Figure 4-65 TX IMD3 vs Tone Spacing and Temperature at 1.8GHz

Matching at 2.6GHz, Single tone, fDAC = 11.79648GSPS, interleave mode, 40MHz offset

Figure 4-67 TX Single Tone Output Noise vs Frequency and Amplitude at 1.8GHz

Matching at 1.8GHz, single carrier 20MHz BW TM1.1 LTE

Figure 4-69 TX 20MHz LTE ACPR vs Digital Level at 1.8425GHz

Matching at 1.8GHz, single carrier 20MHz BW TM1.1 LTE

Figure 4-71 TX 20MHz LTE ACPR vs DSA at 1.8GHz

Matching at 1.8GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 4-73 TX HD2 vs Digital Amplitude and Output Frequency at 1.8GHz

fDAC = 8847.36MSPS, straight mode, 1.8GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.

Figure 4-75 TX Single Tone (–12 dBFS) Output Spectrum at 1.8GHz (0-f_DAC)

fDAC = 8847.36MSPS, straight mode, 1.8GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.

Figure 4-77 TX Single Tone (–1dBFS) Output Spectrum at 1.8GHz (0-f_DAC)