米6体育平台手机版

ZHCSPA8A March 2024 – August 2024 AFE7950-SP

PRODMIX

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ALK|400
- MPBGAU3B

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4.11 Switching Characteristics

Typical values at T_A = +25°C, full temperature range is T_A,MIN = -40°C to T_J,MAX = +110°C; TX Input Rate = 491.52MSPS, f_DAC = 8847.36MSPS; f_ADC = 2949.12MSPS; nominal power supplies; 1 tone at -1 dBFS; DSA Attenuation =0dB; SerDes rate = 24.33Gbps; unless otherwise noted.

PARAMETER		TEST CONDITIONS	TYP	UNIT
TX Channel Latency
t_JESDTX	JESD to TX output Latency	LMFSHd=2-8-8-1, 368.64 MSPS input rate, 24x Interpolation, Serdes rate = 16.22Gbps (JESD204C)	152	interface clock cycles⁽¹⁾
		LMFSHd=8-16-4-1, 491.52 MSPS 24x Interpolation, Serdes rate = 16.22Gbps (JESD204C)	176
		LMFSHd=4-16-8-1, 245.76 MSPS 48x Interpolation, Serdes rate = 16.22Gbps (JESD204C)	124
		LMFSHd=2-16-16-1, 122.88 MSPS 96x Interpolation, Serdes rate = 16.22Gbps (JESD204C)	97
RX Channel Latency
	SerDes Transmitter Analog Delay		3.6	ns
t_JESDRX	RX input to JESD output Latency	LMFS=2-16-16-1, 122.88 MSPS, 24x Decimation, Serdes rate = 16.22Gbps (JESD204C)	92	interface clock cycles⁽¹⁾
		LMFS=4-16-8-1, 245.76 MSPS, 12x Decimation, Serdes rate = 16.22Gbps (JESD204C)	108
		LMFS=4-8-4-1, 491.52 MSPS, 6x Decimation, Serdes rate = 16.22Gbps (JESD204C)	153
FB Channel Latency
	SerDes Transmitter Analog Delay		3.6	ns
t_JESDFB	FB input to JESD output Latency	LMFS=1-2-8-1, 368.64 MSPS, 8x Decimation	151	interface clock cycles⁽¹⁾
t_JESDFB	FB input to JESD output Latency	LMFS=2-4-4-1, 491.52 MSPS, 6x Decimation	177	interface clock cycles⁽¹⁾

(1) Interface clock cycles is the period of the digital interface sample rate, e.g. 1GSPS = 1ns.