SPRS550F October   2009  – July 2014 AM3505 , AM3517

PRODUCTION DATA.  

  1. 1Device Summary
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Comparison
    1. 3.1 Device Features Comparison
    2. 3.2 ZCN and ZER Package Differences
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Assignments
      1. 4.1.1 Pin Map (Top View)
    2. 4.2 Ball Characteristics
    3. 4.3 Multiplexing Characteristics
    4. 4.4 Signal Description
      1. 4.4.1 External Memory Interfaces
      2. 4.4.2 Video Interfaces
      3. 4.4.3 Serial Communication Interfaces
      4. 4.4.4 Removable Media Interfaces
      5. 4.4.5 Test Interfaces
      6. 4.4.6 Miscellaneous
      7. 4.4.7 General-Purpose IOs
      8. 4.4.8 System and Miscellaneous Terminals
      9. 4.4.9 Power Supplies
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Handling Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Consumption Summary
    5. 5.5  Electrical Characteristics
    6. 5.6  Thermal Characteristics
    7. 5.7  Core Voltage Decoupling
    8. 5.8  Power-up and Power-down
      1. 5.8.1 Power-up Sequence
      2. 5.8.2 Power-down Sequence
    9. 5.9  Clock Specifications
      1. 5.9.1 Oscillator
      2. 5.9.2 Input Clock Specifications
      3. 5.9.3 Output Clock Specifications
      4. 5.9.4 DPLL Specifications
        1. 5.9.4.1 Digital Phase-Locked Loop (DPLL)
          1. 5.9.4.1.1 DPLL1 (MPU)
          2. 5.9.4.1.2 DPLL3 (CORE)
          3. 5.9.4.1.3 DPLL4 (Peripherals)
          4. 5.9.4.1.4 DPLL5 (Second peripherals DPLL)
        2. 5.9.4.2 DPLL Noise Isolation
    10. 5.10 Video DAC Specifications
      1. 5.10.1 Interface Description
      2. 5.10.2 Electrical Specifications Over Recommended Operating Conditions
      3. 5.10.3 Analog Supply (vdda_dac) Noise Requirements
      4. 5.10.4 External Component Value Choice
  6. 6Timing Requirements and Switching Characteristics
    1. 6.1 Timing Test Conditions
    2. 6.2 Interface Clock Specifications
      1. 6.2.1 Interface Clock Terminology
      2. 6.2.2 Interface Clock Frequency
      3. 6.2.3 Clock Jitter Specifications
      4. 6.2.4 Clock Duty Cycle Error
    3. 6.3 Timing Parameters
    4. 6.4 External Memory Interfaces
      1. 6.4.1 General-Purpose Memory Controller (GPMC)
        1. 6.4.1.1 GPMC/NOR Flash Interface Synchronous Timing
        2. 6.4.1.2 GPMC/NOR Flash Interface Asynchronous Timing
        3. 6.4.1.3 GPMC/NAND Flash Interface Timing
      2. 6.4.2 SDRAM Controller (SDRC)
        1. 6.4.2.1 LPDDR Interface
          1. 6.4.2.1.1 LPDDR Interface Schematic
          2. 6.4.2.1.2 Compatible JEDEC LPDDR Devices
          3. 6.4.2.1.3 PCB Stackup
          4. 6.4.2.1.4 Placement
          5. 6.4.2.1.5 LPDDR Keep Out Region
          6. 6.4.2.1.6 Net Classes
          7. 6.4.2.1.7 LPDDR Signal Termination
          8. 6.4.2.1.8 LPDDR CK and ADDR_CTRL Routing
        2. 6.4.2.2 DDR2 Interface
          1. 6.4.2.2.1  DDR2 Interface Schematic
          2. 6.4.2.2.2  Compatible JEDEC DDR2 Devices
          3. 6.4.2.2.3  PCB Stackup
          4. 6.4.2.2.4  Placement
          5. 6.4.2.2.5  DDR2 Keep Out Region
          6. 6.4.2.2.6  Bulk Bypass Capacitors
          7. 6.4.2.2.7  High-Speed Bypass Capacitors
          8. 6.4.2.2.8  Net Classes
          9. 6.4.2.2.9  DDR2 Signal Termination
          10. 6.4.2.2.10 VREF Routing
          11. 6.4.2.2.11 DDR2 CLK and ADDR_CTRL Routing
          12. 6.4.2.2.12 On Die Termination (ODT)
    5. 6.5 Video Interfaces
      1. 6.5.1 Video Processing Subsystem (VPSS)
        1. 6.5.1.1 Video Processing Front End (VPFE)
          1. 6.5.1.1.1 Video Processing Front End (VPFE) Timing
      2. 6.5.2 Display Subsystem (DSS)
        1. 6.5.2.1 LCD Display Support in Bypass Mode
          1. 6.5.2.1.1 LCD Display in TFT Mode
          2. 6.5.2.1.2 LCD Display in STN Mode
    6. 6.6 Serial Communications Interfaces
      1. 6.6.1  Multichannel Buffered Serial Port (McBSP) Timing
        1. 6.6.1.1 McBSP in Normal Mode
          1. 6.6.1.1.1 McBSP1
          2. 6.6.1.1.2 McBSP2
          3. 6.6.1.1.3 McBSP3
            1. 6.6.1.1.3.1 McBSP3 Multiplexed on McBSP3 Pins
            2. 6.6.1.1.3.2 McBSP3 Multiplexed on UART2 or McBSP1 Pins
          4. 6.6.1.1.4 McBSP4
          5. 6.6.1.1.5 McBSP5
          6. 6.6.1.1.6 McBSP in TDM Mode
          7. 6.6.1.1.7 McBSP Timing Diagrams
      2. 6.6.2  Multichannel Serial Port Interface (McSPI) Timing
        1. 6.6.2.1 McSPI in Slave Mode
        2. 6.6.2.2 McSPI in Master Mode
      3. 6.6.3  Multiport Full-Speed Universal Serial Bus (USB) Interface
        1. 6.6.3.1 Multiport Full-Speed Universal Serial Bus (USB) - Unidirectional Standard 6-pin Mode
        2. 6.6.3.2 Multiport Full-Speed Universal Serial Bus (USB) - Bidirectional Standard 4-pin Mode
        3. 6.6.3.3 Multiport Full-Speed Universal Serial Bus (USB) - Bidirectional Standard 3-pin Mode
      4. 6.6.4  Multiport High-Speed Universal Serial Bus (USB) Timing
        1. 6.6.4.1 High-Speed Universal Serial Bus (USB) on Ports 1 and 2 12-bit Master Mode
      5. 6.6.5  USB0 OTG (USB2.0 OTG)
        1. 6.6.5.1 USB OTG Electrical Parameters
      6. 6.6.6  High-End Controller Area Network Controller (HECC) Timing
        1. 6.6.6.1 HECC Timing Requirements
        2. 6.6.6.2 HECC Switching Characteristics
      7. 6.6.7  Ethernet Media Access Controller (EMAC)
        1. 6.6.7.1 EMAC Electrical Data/ Timing
      8. 6.6.8  Management Data Input/Output (MDIO)
        1. 6.6.8.1 Management Data Input/Output (MDIO) Electrical Data/Timing
      9. 6.6.9  Universal Asynchronous Receiver/Transmitter (UART)
        1. 6.6.9.1 UART IrDA Interface
          1. 6.6.9.1.1 IrDA—Receive Mode
          2. 6.6.9.1.2 IrDA—Transmit Mode
      10. 6.6.10 HDQ / 1-Wire Interfaces
        1. 6.6.10.1 HDQ Protocol
        2. 6.6.10.2 1-Wire Protocol
      11. 6.6.11 I2C Interface
        1. 6.6.11.1 I2C Standard/Fast-Speed Mode
        2. 6.6.11.2 I2C High-Speed Mode
    7. 6.7 Removable Media Interfaces
      1. 6.7.1 High-Speed Multimedia Memory Card (MMC) and Secure Digital IO Card (SDIO) Timing
        1. 6.7.1.1 MMC/SD/SDIO in SD Identification Mode
        2. 6.7.1.2 MMC/SD/SDIO in High-Speed MMC Mode
        3. 6.7.1.3 MMC/SD/SDIO in Standard MMC Mode and MMC Identification Mode
        4. 6.7.1.4 MMC/SD/SDIO in High-Speed SD Mode
        5. 6.7.1.5 MMC/SD/SDIO in Standard SD Mode
    8. 6.8 Test Interfaces
      1. 6.8.1 Embedded Trace Macro Interface (ETM)
      2. 6.8.2 JTAG Interfaces
        1. 6.8.2.1 JTAG Free Running Clock Mode
        2. 6.8.2.2 JTAG Adaptive Clock Mode
  7. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Getting Started and Next Steps
      2. 7.1.2 Device Nomenclature
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation
    3. 7.3 Related Links
    4. 7.4 Community Resources
    5. 7.5 Trademarks
    6. 7.6 Electrostatic Discharge Caution
  8. 8Mechanical Packaging and Orderable Information
    1. 8.1 Package Option Addendum

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • ZER|484
  • ZCN|491
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Device and Documentation Support

7.1 Device Support

7.1.1 Development Support

TI offers an extensive line of development tools, including tools to evaluate the performance of the processors, generate code, develop algorithm implementations, and fully integrate and debug software and hardware modules. The tool's support documentation is electronically available within the Code Composer Studio™ Integrated Development Environment (IDE).

7.1.1.1 Getting Started and Next Steps

The following products support development of the AM3517/05 device applications:

Software Development Tools:

  • Code Composer Studio™ Integrated Development Environment (IDE) for Sitara ARM Processors: an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features.
  • FlashTool for AM35x, AM37x, DM37x and OMAP35x Devices: a Windows-based application that can be used to transfer binary images from a host PC to TI Sitara AM35x, AM37x, DM37x and OMAP35x target platforms.
  • Pin Mux Utility for ARM Microprocessors: a Windows-based software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI ARM MPUs.
  • Power Estimation Tool (PET): provides users the ability to gain insight in to the power consumption of select Sitara and OMAP processors.

Hardware Development Tools:

  • Uniflash Standalone Flash Tool for TI Microcontrollers (MCUs) and Sitara Processors: a standalone tool used to program on-chip flash memory on TI MCUs and on-board flash memory for Sitara processors.
  • XDS200 Price/Performance-balanced Debug Probe: a JTAG emulator for TI embedded processors.
  • XDS560 High Performance Debug Probe: combines state-of-the-art silicon, hardware, and software technology to provide the best hardware debug capabilities.

For a complete listing of development-support tools for the AM3517/05 platform, visit the Texas Instruments website at www.ti.com. For information on pricing and availability, contact the nearest TI field sales office or authorized distributor.

7.1.2 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all AM3517/05 processors and support tools. Each device has one of three prefixes: X, P, or null (no prefix). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (TMDX) through fully qualified production devices/tools (TMDS).

Device development evolutionary flow:

    XExperimental device that is not necessarily representative of the final devices electrical specifications and may not use production assembly flow. (TMX definition)
    PPrototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications. (TMP definition)
    nullProduction version of the silicon die that is fully qualified. (TMS definition)

Support tool development evolutionary flow:

    TMDXDevelopment support product that has not yet completed Texas Instruments internal qualification testing.
    TMDSFully qualified development support product.

TMX and TMP devices and TMDX development-support tools are shipped against the following disclaimer:

Developmental product is intended for internal evaluation purposes.

Production devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TIs standard warranty applies.

Predictions show that prototype devices (X or P), have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

For additional description of the device nomenclature markings, see the AM35x ARM Microprocessor Silicon Errata (SPRZ306).

sprs550_dg_nomenupdated3.gifFigure 7-1 Device Nomenclature

7.2 Documentation Support

7.2.1 Related Documentation

The following documents describe the AM3517/05 device. Copies of these documents are available on the Internet at www.ti.com. Tip: Enter the literature number in the search box provided at www.ti.com.

The current documentation that describes the AM3517/05 Sitara processor, related peripherals, and other technical collateral, is available in the product folder at: www.ti.com.

    SPRUGR0AM35x ARM Microprocessor Technical Reference Manual. Collection of documents providing detailed information on the Sitara architecture including power, reset, and clock control, interrupts, memory map, and switch fabric interconnect. Detailed information on the microprocessor unit (MPU) subsystem as well a functional description of the peripherals supported on AM3517/05 devices is also included.

The following documents are related to the AM3517/05 device. Copies of these documents can be obtained directly from the internet or from your Texas Instruments representative.

Cortex-A8 Technical Reference Manual. This is the technical reference manual for the Cortex-A8 processor. A copy of this document can be obtained via the internet at http://infocenter.arm.com. See the AM35x ARM Microprocessor Silicon Errata (SPRZ306) to determine the revision of the Cortex-A8 core used on your device.

ARM Core Cortex™-A8 (AT400/AT401) Errata Notice. Provides a list of advisories for the different revisions of the Cortex-A8 processor. Contact your TI representative for a copy of this document. See the AM35x ARM Microprocessor Silicon Errata (SPRZ306) to determine the revision of the Cortex-A8 core used on your device.

7.3 Related Links

Table 7-1 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy.

Table 7-1 Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY
AM3517 Click here Click here Click here Click here Click here
AM3505 Click here Click here Click here Click here Click here

7.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

7.5 Trademarks

PowerVR SGX is a trademark of Imagination Technologies Ltd.

Via Channel, E2E are trademarks of Texas Instruments.

NEON is a trademark of ARM Ltd or its subsidiaries.

Cortex, Jazelle are registered trademarks of ARM Ltd or its subsidiaries.

All other trademarks are the property of their respective owners.

7.6 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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