米6体育平台手机版

ZHCSLA7C December 2019 – September 2023 AM6526 , AM6528 , AM6546 , AM6548

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

NO.	PARAMETER	DESCRIPTION	MIN	MAX	UNIT
LFD6	t_c(clk)	CLK period, CLK	10		ns
LFD7	t_w(clk)	Pulse width, CLK	4.5		ns
LFD8	t_w(csIV)	Pulse width, CS0 invalid between operations	10		ns
LFD9	t_d(clkH-csL)	Delay time, CS0 active to CLK rising		-3.39	ns
LFD10	t_{d(clkL[LE]-csH)}	Delay time, last falling CLK edge to CS0 inactive	0.39		ns
LFD11	t_{d(clkX-rwdsV)}	Delay time, CLK transition to RWDS valid	1.39	3.62	ns
LFD12	t_{d(clkX-d[0:7]V)}	Delay time, CLK transitioning to D0:7 valid	1.21	3.8	ns

Figure 6-63 HyperBus Timing Diagrams - Transmitter Mode

Figure 6-64 HyperBus Timing Diagrams - Receiver Mode

Figure 6-65 HyperBus Timing Diagrams - Reset

For more information, see section HyperBus Interface in the device TRM.