ZHCSLA7C December 2019 – September 2023 AM6526 , AM6528 , AM6546 , AM6548
PRODUCTION DATA
Each VDDSHV[8:0], and VDDSHV[2:0]_WKUP can be configured as 1.8 V or 3.3 V. Figure 8-7 through Figure 8-10 illustrate different system configurations for the dual-voltage I/O supplies.
VDDSHV[8:0], and VDDSHV[2:0]_WKUP are the dual-voltage LVCMOS I/O supplies, while VDDS[8:0] are the dual-voltage LVCMOS I/O bias supplies. If any of the VDDSHV[8:0] or VDDSHV[2:0]_WKUP are configured for 3.3 V operation, the corresponding VDDS[8:0] or VDDS[2:0]_WKUP should be sourced from the internal I/O Bias LDO. When any of the VDDSHV[8:0] or VDDSHV[2:0]_WKUP are configured for 1.8 V operation, both VDDS[8:0] and VDDSHV[8:0] or VDDS[2:0]_WKUP and VDDSHV[2:0]_WKUP should be supplied from the same source.
Two I/O Bias LDOs are integrated on this device to share load current. The recommended load sharing is as follows:
Figure 8-7 shows all VDDSHV[8:0], and VDDSHV[2:0]_WKUP supplies configured for 3.3V operation.
Figure 8-8 shows all VDDSHV[8:0] and VDDSHV[2:0]_WKUP supplies configured for 1.8 V operation.
Figure 8-9 shows a split configuration where VDDSHV[0, 1, 2, 5, 8] and VDDSHV0_WKUP are configured for 3.3 V operation, while VDDSHV[3, 4, 6, 7] and VDDSHV[2:1]_WKUP are configured for 1.8 V operation. Note the colors indicate rails that are tied to the same source.
Figure 8-10through Figure 8-12 illustrates the system configuration when VDDSHV6 or VDDSHV7 is used as the MMCSD supply.