SBASB15 October   2024 AMC0380D-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagram
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Isolation Channel Signal Transmission
      3. 6.3.3 Analog Output
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Best Design Practices
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DFX|15
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, VDD1 = 3.0V to 5.5V, VDD2 = 3.0V to 5.5V, VSNSP = –1V to +1V, and VSNSN = 0V; typical specifications are at TA = 25°C, VDD1 = 5V, VDD2 = 3.3V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
RIN Input resistance AMC0380D04-Q1 TBD 8 TBD MΩ
AMC0380D06-Q1 TBD 10 TBD
AMC0380D10-Q1 TBD 12.5 TBD
Nominal resistive divider ratio VHVIN / VSNSP, AMC0380D04-Q1 401 V/V
VHVIN / VSNSP, AMC0380D06-Q1 601
VHVIN / VSNSP, AMC0380D10-Q1 1001
CMTI Common-mode transient immunity 50 V/ns
ANALOG OUTPUT
Nominal attenuation VHVIN / (VOUTP – VOUTN), AMC0380D04-Q1 401 : 2 V/V
VHVIN / (VOUTP – VOUTN), AMC0380D06-Q1 601 : 2
VHVIN / (VOUTP – VOUTN), AMC0380D10-Q1 1001 : 2
VCMout Output common-mode voltage 1.39 1.44 1.49 V
VCLIPout Clipping differential output voltage VOUT = (VOUTP – VOUTN);
VIN > VClipping		 2.49 V
VFAILSAFE Failsafe differential output voltage VDD1 undervoltage, or VDD1 missing –2.6 –2.5 V
ROUT Output resistance OUTP or OUTN <0.2 Ω
Output short-circuit current On OUTP or OUTN, sourcing or sinking,
HVIN = GND1, outputs shorted to
either GND or VDD2		 11 mA
DC ACCURACY
VOS Input offset voltage Referred to SNSP,
TA = 25°C, HVIN = GND1		 –1.5 ±0.4 1.5 mV
Referred to HVIN, HVIN = GND1, TA = 25°C,
AMC0380D04-Q1		 –600 ±160 600
Referred to HVIN, HVIN = GND1, TA = 25°C,
AMC0380D06-Q1		 –900 ±240 900
Referred to HVIN, HVIN = GND1, TA = 25°C,
AMC0380D10-Q1		 –1500 ±400 1500
TCVOS Input offset thermal drift(3) Referred to SNSP,
HVIN = GND1		 –0.01 ±0.003 0.01 mV/°C
Referred to HVIN, HVIN = GND1, AMC0380D04-Q1 –4 ±1.2 4
Referred to HVIN, HVIN = GND1, AMC0380D06-Q1 –6 ±1.8 6
Referred to HVIN, HVIN = GND1, AMC0380D10-Q1 –10 ±3 10
EA Attenuation error(1) TA = 25°C –0.25 ±0.05 0.25 %
TCEA Attenuation error temperature drift(4) –40 ±5 40 ppm/°C
Nonlinearity(2) –0.05% ±0.01% 0.05%
Output noise VIN = GND1, BW = 100kHz TBD µVrms
PSRR Power-supply rejection ratio(5) VDD1 DC PSRR, HVIN = GND1,
VDD1 from 3V to 5.5V		 –80 dB
VDD1 AC PSRR, HVIN = GND1,
VDD1 with 10kHz / 100mV ripple		 –80
VDD2 DC PSRR, HVIN = GND1,
VDD2 from 3V to 5.5V		 –100
VDD2 AC PSRR, HVIN = GND1,
VDD2 with 10kHz / 100mV ripple		 –86
AC ACCURACY
BW Output bandwidth 90 110 kHz
THD Total harmonic distortion VSNSP = 2VPP, SNSN = GND1,
fIN = 10kHz, BW = 10kHz		 –93 dB
SNR Signal-to-noise ratio VSNSP = 2VPP, SNSN = GND1,
fIN = 1kHz, BW = 10kHz		 79 85 dB
SNR Signal-to-noise ratio VSNSP = 2VPP, SNSN = GND1,
fIN = 10kHz, BW = 100kHz		 70.9 dB
POWER SUPPLY
IDD1 High-side supply current 4.2 6.0 mA
IDD2 Low-side supply current 6.0 9.9 mA
VDD1UV High-side undervoltage detection threshold VDD1 rising 2.5 2.6 2.7 V
VDD1 falling 1.9 2.0 2.1
VDD2UV Low-side undervoltage detection threshold VDD2 rising 2.5 2.6 2.7 V
VDD2 falling 1.9 2.0 2.1
(1) The typical value includes one sigma statistical variation.
(2) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer
function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
(3) Offset error drift is calculated using the box method, as described by the following equation:
TCEO = (valueMAX - valueMIN) / TempRange
(4) Gain error drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = ((valueMAX - valueMIN) / (value x TempRange)) X 106
(5) This parameter is referred to SNSP.
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