SBASB17 October 2024 AMC0381D-Q1
ADVANCE INFORMATION
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tr | Output signal rise time | 1.8 | µs | |||
| tf | Output signal fall time | 1.8 | µs | |||
| VHVIN to VOUTx signal delay (50% – 10%) | Unfiltered output | 2.4 | µs | |||
| VHVIN to VOUTx signal delay (50% – 50%) | Unfiltered output | 3.0 | 3.2 | µs | ||
| VHVIN to VOUTx signal delay (50% – 90%) | Unfiltered output | 4.2 | µs | |||
| tAS | Analog settling time | VDD1 step to 3.0V with VDD2 ≥ 3.0V, to VOUTP, VOUTN valid, 0.1% settling | 50 | 100 | µs | |