ZHCSPG7 February   2022 AMC1306M25-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8.     Safety Limiting Values
    9. 6.8  Electrical Characteristics
    10.     Switching Characteristics
    11. 6.9  Timing Diagrams
    12. 6.10 Insulation Characteristics Curves
    13. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Digital Output
        1. 7.3.4.1 Output Behavior in Case of a Full-Scale Input
        2. 7.3.4.2 Output Behavior in Case of Input Common-Mode Overrange
        3. 7.3.4.3 Output Behavior in Case of a Missing High-Side Supply
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Bitstream Filtering
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.1 Analog Input

The differential amplifier input stage of the AMC1306M25-Q1 feeds a second-order, switched-capacitor, feed-forward ΔΣ modulator. The gain of the differential amplifier is set by internal precision resistors with a differential input impedance of RIND. The modulator converts the analog input signal into a bitstream that is transferred across the isolation barrier, as described in the Section 7.3.3 section.

For reduced offset and offset drift, the differential amplifier is chopper-stabilized with the switching frequency set at fCLKIN / 32. As shown in Figure 7-1, the switching frequency generates a spur at 625 kHz.

sinc3 filter, OSR = 2, fCLKIN = 20 MHz, fIN = 1 kHz
Figure 7-1 Quantization Noise Shaping

There are two restrictions on the analog input signals INP and INN. First, if the input voltages VINP or VINN exceed the range specified in the Section 6.1 table, the input currents must be limited to the absolute maximum value because the electrostatic discharge (ESD) protection turns on. In addition, the linearity and parametric performance of the device are ensured only when the analog input voltage remains within the linear full-scale range (VFSR) and within the common-mode input voltage range (VCM) as specified in the Section 6.3 table.
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