ZHCSG26C March 2017 – Janaury 2020 AMC1306E05 , AMC1306E25 , AMC1306M05 , AMC1306M25
PRODUCTION DATA.
The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). A very simple filter, built with minimal effort and hardware, is a sinc3-type filter, as shown in Equation 2:
This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-order modulator. All the characterization in this document is also done with a sinc3 filter with an oversampling ratio (OSR) of 256 and an output word width of 16 bits.
The effective number of bits (ENOB) is often used to compare the performance of ADCs and ΔΣ modulators. Figure 55 shows the ENOB of the AMC1306 with different oversampling ratios. In this document, this number is calculated from the SINAD by using Equation 3:
An example code for implementing a sinc3 filter in an FPGA is discussed in the Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications application note, available for download at www.ti.com.