7.3.1 Analog Input

The AMC1336-Q1 incorporates front-end circuitry that contains an instrumentation amplifier, followed by a ΔΣ modulator. To support a bipolar input range with a unipolar high-side supply AVDD, the device uses a charge pump to simplify the overall system design and minimize circuit cost. For reduced offset and offset drift, the input buffer is chopper-stabilized with the switching frequency set at f_CLKIN / 32. Figure 39 illustrates the spur created by the switching frequency.

sinc3 filter, OSR = 1, fCLKIN = 20 MHz, fIN = 1 kHz

Figure 39. Quantization Noise Shaping

The linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR), that is ±1 V, and within the specified input common-mode range.

Figure 40 shows the specified common-mode input voltage that applies for the full-scale input voltage range as specified in this document.

If smaller input signals are used, the operational common-mode input voltage range widens. Figure 41 shows the common-mode input voltage that applies with no differential input signal; that is, when the voltage applied on AINP is equal to the voltage applied on AINN. The common-mode input voltage range scales with the actual differential input voltage between this range and the range in Figure 40.

Figure 40. Common-Mode Input Voltage Range With a
Clipping Differential Input Signal of ±1.25 V

Figure 41. Common-Mode Input Voltage Range With a
Zero Differential Input Signal

There are two restrictions on the analog input signals (AINP and AINN). First, if the input voltage exceeds the range AGND – 5 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR) and within the specified input common-mode range.