ZHCSKS7B June 2020 – September 2024 AMC3330-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ANALOG INPUT | ||||||
RIN | Single-ended input resistance | INN = HGND | 0.1 | 0.8 | GΩ | |
RIND | Differential input resistance | 0.1 | 1.2 | |||
IIB | Input bias current | INP = INN = HGND, IIB = (IIBP + IIBN) / 2 | –10 | 2.5 | 10 | nA |
TCIIB | Input bias current drift | –14 | pA/°C | |||
IIO | Input offset current | IIO = IINP – IINN; INP = INN = HGND | –10 | -0.8 | 10 | nA |
CIN | Single-ended input capacitance | INN = HGND, fIN = 310 kHz | 2 | pF | ||
CIND | Differential input capacitance | fIN = 310 kHz | 2 | |||
ANALOG OUTPUT | ||||||
Nominal gain | 2 | V/V | ||||
VCMout | Common-mode output voltage | 1.39 | 1.44 | 1.49 | V | |
VCLIPout | Clipping differential output voltage | VOUT = (VOUTP – VOUTN); |VIN| = |VINP – VINN| > VClipping |
±2.49 | V | ||
VFailsafe | Failsafe differential output voltage | V+ = (VOUTP – VOUTN); VDCDCout ≤ VDCDCUV or VHLDOout ≤ VHLDOUV | –2.57 | –2.5 | V | |
BWOUT | Output bandwidth | 300 | 375 | kHz | ||
ROUT | Output resistance | On OUTP or OUTN | 0.2 | Ω | ||
Output short-circuit current | On OUTP or OUTN, sourcing or sinking, INP = INN = HGND, outputs shorted to either GND or VDD | 14 | mA | |||
CMTI | Common-mode transient immunity | |HGND – GND| = 2 kV | 85 | 135 | kV/µs | |
ACCURACY | ||||||
VOS | Input offset voltage(1)(2) | TA = 25°C, INP = INN = HGND | –0.3 | ±0.05 | 0.3 | mV |
TCVOS | Input offset drift(1)(2)(4) | –4 | ±1 | 4 | µV/°C | |
EG | Gain error | TA = 25°C | –0.2% | –0.08% | 0.2% | |
TCEG | Gain error drift(1)(5) | –45 | ±7 | 45 | ppm/°C | |
Nonlinearity | –0.02% | 0.01% | 0.02% | |||
Nonlinearity drift | 0.4 | ppm/°C | ||||
SNR | Signal-to-noise ratio | VIN = 2 VPP, fIN = 1 kHz, BW = 10 kHz, 10 kHz filter |
81 | 85 | dB | |
VIN = 2 VPP, fIN = 10 kHz, BW = 100 kHz, 1 MHz filter |
72 | |||||
THD | Total harmonic distortion(3) | VIN = 2 Vpp, fIN = 10 kHz, BW = 100 kHz |
–84 | dB | ||
Output noise | INP = INN = HGND, fIN = 0 Hz, BW = 100 kHz |
250 | µVRMS | |||
CMRR | Common-mode rejection ratio | fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max | –100 | dB | ||
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max | –86 | |||||
PSRR | Power-supply rejection ratio | VDD from 3.0 V to 5.5 V, at dc, input referred | –98 | dB | ||
INP = INN = HGND, VDD from 3.0 V to 5.5 V, 10 kHz / 100 mV ripple, input referred | –86 | |||||
DIGITAL OUTPUT ( DIAG) | ||||||
VOL | Low-level output voltage | ISINK= 4 mA | 80 | 250 | mV | |
ILKG | Open-drain output leakage current | VDD = 5V | 5 | 100 | nA | |
POWER SUPPLY | ||||||
IDD | Low-side supply current | No external load on HLDO | 28.5 | 41 | mA | |
1 mA external load on HLDO | 30.5 | 43 | mA | |||
VDDUV | VDD analog undervoltage detection threshold | VDD rising | 2.9 | V | ||
VDD falling | 2.8 | |||||
VDDPOR | VDD digital reset threshold | VDD rising | 2.5 | V | ||
VDD falling | 2.4 | |||||
VDCDC_OUT | DC/DC output voltage | DCDC_OUT to HGND | 3.1 | 3.5 | 4.65 | V |
VDCDCUV | DC/DC output undervoltage detection threshold voltage | DCDC output falling | 2.1 | 2.25 | V | |
VHLDO_OUT | High-side LDO output voltage | HLDO to HGND, up to 1 mA external load | 3 | 3.2 | 3.4 | V |
VHLDOUV | High-side LDO output undervoltage detection threshold voltage | HLDO output falling | 2.4 | 2.6 | V | |
IH | High-side supply current for auxiliary circuitry | 3 V ≤ VDD < 4.5 V, load connected from HLDO_OUT to HGND, non-switching | 1 | mA | ||
4.5 V ≤ VDD ≤ 5.5 V, load connected from HLDO_OUT to HGND, non-switching | 4.3 | |||||
tAS | Analog settling time | VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling | 0.6 | 1.1 | ms |