The alert response address is a feature of SMBus devices that allows an interrupting device to identify itself to the host when multiple devices issue simultaneous interrupts. The SMBALERT pin is an open-drain interrupt output pin. When the AMC6821-Q1 issues an interrupt request, the following procedure occurs:

1. SMBALERT is pulled low.
2. The bus master sends an alert response address or ARA (ARA = 0001100), and initiates a read operation (see Table 8-12).
3. The AMC6821-Q1 responds to the ARA by sending its slave address back. The 7-bit device slave address is placed in the seven most significant bits of the byte; the last bit is '0'.
4. The master receives the AMC6821-Q1 slave address and starts the interrupt service.
5. If more than one device pulls the SMBus low, the highest priority (lowest slave address) device wins the communication right via standard arbitration during the slave address transfer (refer to the SMBus specification version 2.0 for details).
6. To service the interrupt request of the AMC6821, the master must read the status register. Most interrupt source bits in the status registers are cleared after reading the status register, and are reasserted if the error condition still exists on the next monitoring cycle. The SMBALERT only clears if the interrupt has been resolved.